Hi Rolando,
The LWIP core requires the opb_ethernetlite IP core as indicated. You need
to request a license for this from Xilinx.

Glenn


On Mon, Dec 30, 2013 at 4:45 PM, Rolando Paz <[email protected]> wrote:

> Hi Glenn
>
> I drop the LWIP yellow block in my design and then I try to compile, but
> I get the following error:
>
> Performing Clock DRCs...
>
> INFO:coreutil - No license for component <opb_ethernetlite_v1> found. You
> may
>    use the customization GUI for this component but you will not be able
> to
>    generate any implementation or simulation files.
>
>    For license installation help, please visit:
>    www.xilinx.com/ipcenter/ip_license/ip_licensing_help.htm
>
>    For ordering information, please refer to the product page for this
> component
>    on: www.xilinx.com FLEXlm Error: No such feature exists. (-5,21)
> ERROR:MDT - IPNAME:opb_ethernetlite
>    INSTANCE:spec_256_ibob_quadc_ibob_lwip_ethlite -
>    C:\specibob\spec_256_ibob_quadc\XPS_iBOB_base\system.mhs line 331 -
> invalid
>    license or no license found!
> ERROR:MDT - platgen failed with errors!
> make: *** [implementation/system.bmm] Error 2
> ERROR:MDT - Error while running "make -f system.make init_bram"
> No changes to be saved in MSS file
> Saved project XMP file
> Error using ==> gen_xps_files at 680
> Programation files generation failed, EDK compilation probably also failed.
>
> What do you think?
>
> Best Regards
>
> Rolando Paz
>
>
>
>
>
> 2013/12/30 G Jones <[email protected]>
>
>> Hi Rolando,
>> You just need to drop the LWIP yellow block in your design and it will
>> automatically allow you to talk to the iBOB tiny shell interface over the
>> ethernet port. There is also an option for faster UDP communications, which
>> might have become the default at some point.. it's been a while since I've
>> worked with this. Let me know if you need more information. I think a fair
>> bit is documented somewhere on the CASPER wiki.
>>
>> Glenn
>>
>>
>> On Mon, Dec 30, 2013 at 4:34 PM, Rolando Paz <[email protected]> wrote:
>>
>>> I understand that LWIP block allows the use of Ethernet port on a IBOB.
>>> But I do not know how to activate this block to compile. Can anyone explain
>>> me?
>>>
>>> Best Regards
>>>
>>>
>>> Rolando Paz
>>>
>>
>>
>

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