sounds like you are using the adc5G board as a pair of 2.5 Gsps ADC's? you are building a dual input spectrometer ?
if you are using the adc board as a dual ADC board, then the yellow block will produce 8 samples per fpga clock for each of the two adc's. with both adc's sampling at 2.5 Gsps, the FPGA clock rate will be 2.5 Gsps / 8 = 312.5 MHz. on the other hand, if you are configuring your adc board as a single input ADC, and sampling at 5 Gsps, then you'll get 16 adc samples per fpga clock, and the fpga clock rate is the same: 5 Gsps / 16 = 312.5 MHz. to acheive these high fpga clock rates, you will need to use plan ahead (floor planning). there are several 3, 4 and 5 Gsps spectrometer roach2 asiaa adc designs you could use or adapt, one by jack hickish, another by ryan monroe. vegas has a dual 3Gsps spectrometer design. best wishes, dan On Thu, Feb 20, 2014 at 8:40 PM, Shobhit Jain <[email protected]> wrote: > Hello all, > > I am designing a 1.25 GHz bandwidth 4096 channel spectrum analyzer using > Roach-2 (Rev-2) and ASIAA Sinica 5GSPS ADC kit. My design is based on tut-3 > and I am using ADC 5g yellow block in my design (1:1 demux, A&C Mode, clock > freq: 1250 MHz). Problem is that I am getting a constant spectrum (which I > don't understand) only when quant gain is very high (0Xffffffff) and no > spectrum for lower quant gain, even if I don't give any input to ADC. > > > Also I have some questions, some may be quite trivial, but sorry for that: > > > First, what should be the clock frequency for Roach-2 (312.5 or 156.25 > MHz)? > > > Second, is it necessary to run ADC-tests before running and compiling any > design using that ADC? Because if yes then I have got a result that > calibration test failed. > > > Can someone please help me with this? > > > Shobhit > > > P.S.- I have attached an image of constant spectrum which I am getting. >
