Hi Gopal, The MMCM error you pasted above has nothing to do with the ADC5g block. It is instead coming from the roach_infrastructure pcore which generates the sys_clk signal. What are your XSG core config mask parameters set to?
I'm not sure how the sma_wideband repository differs from ska-sa in terms of the FFT and fixed point toolbox. The two forks have diverged quite a bit and should probably be merged. Perhaps one of the divergences is that the fixed point blocks have been replaced in ska-sa but I am unaware of such a change. Have you tried building your FFT module using the ska-sa fork (without the ADC5g if need be)? Thanks, Rurik On Fri, May 9, 2014 at 2:09 PM, Gopal Narayanan <[email protected]> wrote: > Hi Casperites, > > I am trying to use the ASIAA ADC chip in a simulink design. To start with > all I have in my design is the chip operating in two channel (A&C mode), > with 1:1 demux on ZDOK 0 with a clock rate of 2 GSps. I just terminated all > outputs of the ADC just for this design. I am using a ROACH2 board in my > design. I get the following error when compiling: > > ERROR:LIT:667 - Block 'MMCM_ADV symbol > > "physical_group_infrastructure_inst/infrastructure_inst/sys_clk_fb_int/infrastructure_inst/infrastructure_inst/MMCM_BASE_sys_clk"' > has its target > frequency, FVCO, out of range. Valid FVCO range for speed grade "-1" is > 600MHz - 1200MHz. The computed FCVO is a function of the input frequency > CLKIN1_PERIOD, the division factor DIVCLK_DIVIDE, and the CLKFBOUT_MULT_F > attribute (FVCO = 1000*CLKFBOUT_MULT_F/(CLKIN1_PERIOD*DIVCLK_DIVIDE)). > The > CLKIN_PERIOD attribute may have been set by ngdbuild based on the user > specified PERIOD constraint. The current calculated FVCO is 400.000000 > MHz. > Reference the V6 architecture Users Guide or search the Xilinx Answer > Records > database for the error code. > Errors found during logical drc. > > I am using Matlab R2012b and XSG 14.5. > This is when I am using the SKA mlib-devel branch. Here are the details of > the mlib git branch: > > $ git rev-parse --short HEAD > b2d72d4 > $ git remote -v > origin https://github.com/ska-sa/mlib_devel.git (fetch) > origin https://github.com/ska-sa/mlib_devel.git (push) > > > I tried to use the SMA mlib_devel branch instead. Here are the details on > the SMA mlib branch I used: > > $ git rev-parse --short HEAD > d4954fd > $ git remote -v > origin https://github.com/sma-wideband/mlib_devel.git (fetch) > origin https://github.com/sma-wideband/mlib_devel.git (push) > > With the SMA mlib devel I am able to compile the simple ASIAA chip design > mentioned above. However, for more complicated designs (I'm trying to put > together a spectrometer with the ASIAA chip) when using FFT modules, the SMA > mlib branch seems to need the Matlab Fixed-Point toolbox, which I don't have > a license for. > > I came across the following thread in the casper mailing lists about the > Fixed Point toolbox: > > https://www.mail-archive.com/[email protected]/msg04488.html > > Anybody have some ideas on what may be causing the MMCM_ADV error seen above > or to circumvent the need for a FP toolbox license? > > Thanks! > > Gopal > > > > -- > Gopal Narayanan Ph #: (413) 545 0925 > Department of Astronomy e-mail: [email protected] > University of Massachusetts Amherst MA 01003 >
