I look in to it and see what I find..
Thank you very much to all! Best Regards, Raul 2014-09-16 15:00 GMT-03:00 Ryan Monroe <[email protected]>: > I support what Dan and Danny have said here. It's likely that I've used > PlanAhead more than anyone else in CASPER and have never experienced this > problem ("Use of planahead reduces system dynamic range"). Here are things > I *have* seen: > > 1. slow designs don't meet timing on some ADC input bits -> when signals > with enough input power toggle those bits errors occur > 2. Some ADC (katadc I think?) has a SPI interface to control various > settings. I couldn't make it clock faster than ~280MHz (even though the > rest of the design was at 325). Since ADC configuration usually seems to > survive an FPGA reprogram, we had to configure the ADC with a slower design > and then reprogram to the faster one > 3. Design didn't meet timing. ADC samples came out right, but started > seeing errors when I cranked up the input power. I have a theory involving > propogation delays into upper bits which describes this problem, but it's > not going to fit into this email > > I would suggest adding snap blocks to the ADCs for the two designs, so > that you can get raw adc samples. Then pick the "working" design, and make > sure you can produce adc sample waveforms which look right (full dynamic > range exercised, waveform is of correct period). Then now that you have > the snap decoding scheme correct, go to the non-working design and check to > see if the raw samples coming in are good as well. I'm betting that you'll > find your problem there. > > Cheers > > --Ryan > > On Tue, Sep 16, 2014 at 10:44 AM, Raul Sapunar Opazo <[email protected]> > wrote: > >> Danny, >> >> I am actually using that ADC on a Roach 2 rev 2 board... but Iam using >> the same adc calibration for all my spectrometers.. and as I said before, >> for the one that planahead was not needed, the dynamic range is fine.. >> >> Regards, >> Raul >> >> 2014-09-16 14:13 GMT-03:00 Danny Price <[email protected]>: >> >> Hi Raul >>> >>> As Dan mentioned, planahead shouldn't make a difference to things like >>> dynamic range. If you're using an ADC that interleaves several cores (eg >>> 5GSPS ADC), this could be something to do with poor ADC calibration. I'd >>> suggest looking into that as a possible cause? >>> >>> Regards >>> Danny >>> >>>> Raul Sapunar Opazo <mailto:[email protected]> >>>> September 16, 2014 at 10:21 AM >>>> >>>> Hello everyone, >>>> >>>> I used planahead to fix the timing problems of a 1.8Ghz 32k channel >>>> spectrometer in roach 2. I did it without troubles, using 38% of the DSP >>>> and less of the 50% of RAMs.. >>>> >>>> After I compiled the model with the new constrains/placement and I >>>> tested the bof, I found out that the numeric noise increased a lot as the >>>> power of the harmonics... >>>> >>>> This issue results in a big decrease of the dinamic range of the >>>> spectrometer in the whole BW (around 25 db against 40-45 db of a 1.8Ghz 16 >>>> k ch spectrometer that didn't need planahead) >>>> >>>> I encountered this problem with an 1.8GHz 8k ch aswell.. so the issue >>>> is not related with the increase of the number of channels.. >>>> >>>> Anyone encountered this kind of problems when using Planahead? As I >>>> understand planahead shouldn't change the performance because it doesn't >>>> make any change in the designs... >>>> >>>> Any help will be appreciated! >>>> >>>> Best Regards, >>>> Raul Sapunar >>>> >>> >> >
