dear casperites, for those of you who are concerned about the variable latency between two adc08-5000 adc's plugged into a roach1/2 board, please see the email chain below, (read from bottom up).
dan ---------- Forwarded message ---------- From: Primiani, Rurik <[email protected]> Date: Thu, Mar 5, 2015 at 11:54 AM Subject: Re: Help with ROACH2 To: Franco <[email protected]> Cc: Dan Werthimer <[email protected]>, "Rurik A. Primiani" < [email protected]>, Jack Hickish <[email protected]> Hi Franco, The one I use for SWARM is the "delay_wideband_prog" block in the "Delays" sub-library of "CASPER DSP Blocks". Best, Rurik On Thu, Mar 5, 2015 at 2:50 PM, Franco <[email protected]> wrote: > Many thanks for all the prompt answers. One more question, when you refer > to a delay FIFO, you are talking about a specific CASPER or Xilinx block? > which one should I use? > > On Thu, Mar 5, 2015 at 4:46 PM, Dan Werthimer <[email protected]> > wrote: > >> >> franko, >> >> one more note, >> >> in some applications, you can correct for the adc delay difference in >> postprocessing >> software, and you won't need to do this in gateware. depends on your >> application. >> >> >> dan >> >> >> On Thu, Mar 5, 2015 at 11:01 AM, Primiani, Rurik < >> [email protected]> wrote: >> >>> Hi Franco, >>> >>> Presently, as Dan says, the ADC5g does not have a deterministic latency. >>> This means that two ADCs may have differential delays of more than 20 or so >>> ADC samples. There are many uninteresting reasons this is the case but in >>> practice either a celestial source or an injected wideband noise source can >>> be used to measure these latencies which can then be removed in gateware. >>> >>> There is no block to do this. You will need to inject some known signal, >>> capture snapshots of data (using the CASPER snapshot blocks), correlate >>> them or in some other way measure the delay, and then feed it back to a >>> delay FIFO somewhere in your design. >>> >>> In theory I supposed you could repeatedly sync one ADC until it is >>> synced with the other, as they did with the iADCs, but there is presently >>> (as far as I know) no code to measure the phase difference between the >>> sampling clocks. >>> >>> Best, >>> Rurik >>> >>> On Thu, Mar 5, 2015 at 1:50 PM, Dan Werthimer <[email protected]> >>> wrote: >>> >>>> >>>> hi franco, >>>> >>>> i'm ccing adc5g yellow block experts jack and rurik on this, >>>> as they know more. >>>> >>>> i don't think the adc5g yellow blocks sync the two adcs plugged >>>> into the roach2. so there could be a different delay between >>>> the two adcs. (an integer number of adc samples, which could change >>>> on every power cycle). we typically measure this delay by pointing >>>> our telescope to a known source, or by injecting a signal into the two >>>> adcs. >>>> >>>> best wishes, >>>> >>>> dan >>>> >>>> >>>> On Thu, Mar 5, 2015 at 10:43 AM, Franco <[email protected]> >>>> wrote: >>>> >>>>> Hello Dan! >>>>> >>>>> My name is Franco Curotto, I'm a student researching in the Millimeter >>>>> Wave Laboratory of the University of Chile. Currently we are having a lot >>>>> of troubles working with ROACH2. Specifically we are trying to >>>>> synchronize both ADCs of the ROACH2. In this answer >>>>> <https://www.mail-archive.com/[email protected]/msg04008.html> >>>>> you wrote that two ADC sync in ROACH1 (I think is ROACH1) thought the >>>>> yellow block. I suppose this means the interleave option of that yellow >>>>> block. >>>>> >>>>> Do you know if there exist a similar yellow block for ROACH2 ADCs >>>>> (adc5g)? If not, do you know a good way to implement it? >>>>> >>>>> Thanks for your time! >>>>> >>>>> Regards, >>>>> Franco Curotto. >>>>> >>>>> -- >>>>> Franco Curotto >>>>> Estudiante de Ingeniería Civil Eléctrica >>>>> Facultad de Ciencias Físicas y Matemáticas >>>>> Universidad de Chile >>>>> >>>> >>>> >>> >> > > > -- > Franco Curotto > Estudiante de Ingeniería Civil Eléctrica > Facultad de Ciencias Físicas y Matemáticas > Universidad de Chile >
