Turning off Behavioral HDL on the relevant instances *is* the correct
answer. This should not impact resource utilization significantly.
If it does, that means you have a large-fanout net, and can improve
timing and utilization simultaneously by doing fanout in a couple steps
(ie, one step with a fanout of 6, followed by 6x steps with fanout of 6
each (=fanout 36 across two steps).
I agree with Jack. DOWN WITH ISE!!! Scarab looked good, if a tiny bit
pricey.
--Ryan
On 01/25/2016 07:17 AM, Jack Hickish wrote:
Ha, I just read my email in the thread you linked. I guess turning off
behavioural hdl isn't (ever? always?) the solution.
On Mon, 25 Jan 2016 5:14 pm Jack Hickish <[email protected]
<mailto:[email protected]>> wrote:
Hi Matt,
You can resynthesize the "main" simulink netlist, but off the top
of my head I don't know the exact way to go about this. I think
you can dig out the netlist from the sysgen build directory and
use the resynth script on that. Perhaps Dave MacMahon (who I
believe wrote that script) could comment further.
My experience was that adding the lc_off flag helped sometimes,
but I still found luts combined on some occasions - I never got
satisfactorily to the bottom of this.
You can explicitly prevent combining of some blocks (eg. delays)
by turning off any behavioural hdl options they have, but this
isn't viable if it needs doing to so many blocks that resource
utilisation ends up being too horrifically impacted.
Having just seen the skarab/roach3 presentation in South Africa, I
fondly await the demise of virtex 6 and ISE.
Jack
On Sat, 23 Jan 2016 10:48 pm Matt Strader
<[email protected] <mailto:[email protected]>> wrote:
Hello Casperites (especially Jack),
I've run into the problem that Jack describes in this thread:
http://www.mail-archive.com/casper%40lists.berkeley.edu/msg05581.html
The compiler keeps wanting to combine unrelated LUTs on
opposite sides of the Virtex 6, resulting in timing errors
that are 90% routing.
At the end of the thread Jack says the solution is to use the
"-lc off" option in resynth_netlist and in map.
I'm using only one black box containing my pfb and fft. The
rest of my design is not black boxed. I used resynth_netlist
on the black box's ngc file, but it looks like I can't use it
on the netlists generated by casper_xps. Is that right?
I also added "-lc off" to the map options in
XPS_ROACH2_base/etc/fast_runtime.opt
After doing this, I'm still getting timing errors from LUT
combining. Is there somewhere else I need to turn this off?
Any suggestions?
Thanks,
Matt Strader
