Hi Homin and Jack, I am pleased to report that Wes and I managed to get the first SKARAB fpg file generated with the microblaze and 40GbE core last week. We haven't done extensive tests on this, but I was able to read registers. We still have lots of optimisations to do and get the wishbone interface for the DSP functional, but at least the first Milestone has been reached. Yes, we are also using JASPER with the Vivado tool set. I have written a document on how to use JASPER, which will eventually end up on the wiki - it is on my to do list. For those that would like to get access to this document please check out the following link - it has been recently updated:
https://docs.google.com/document/d/131VGftG8QoCVqnm5unFcj0pplnPoI17urIgvb-qymu4/edit?usp=sharing (Running Jasper Tool Flow How To) Please feel free to review and send comments concerning this document. Kind Regards, Adam On Tue, Aug 30, 2016 at 8:54 AM, Jack Hickish <jackhick...@gmail.com> wrote: > Hi Homin, > > JASPER works for SNAP (https://casper.berkeley.edu/wiki/SNAP_Bringup -- > there are instructions to find the repo there, too) -- i.e., you can go > from simulink to boffiles. Toolflow support includes all the SNAP-relevant > yellow blocks -- tge, software registers, bram, gpio, on-board ADC. Support > for external ZDOK ADCs (probably the iADC and ADC5g at first) and 1gbe is > forthcoming. All the casper DSP libraries are still supported. > > I believe the SKA-SA folks have the flow ~working for SKARAB. Perhaps > Adam / Wes have an update. > > For new hardware, the tricky part is getting support for the software > interface. For SNAP this is achieved with a raspberry pi talking to the > FPGA over SPI. Replicating this setup on any arbitrary FPGA platform would > be relatively straight-forward. For SKARAB, the comms are through the QSFP > ports, using a microblaze controller - when integrated properly within the > toolflow this should be a much more portable solution. There's probably a > little bit of work also needed if you wish to use the flow with an FPGA > that has different transceivers to SNAP (kintex 7) or SKARAB (virtex 7), > since the existing tge cores might not be immediately compatible. > > Cheers > Jack > > On Mon, 29 Aug 2016 at 19:01 Homin Jiang <ho...@asiaa.sinica.edu.tw> > wrote: > >> Hello: >> >> Could someone update me the status of Vivado based CASPER's >> toolflow/libraries ? And where the link is if available ? >> >> regards >> homin jiang >> >> >> -- Adam Isaacson DBE: FPGA Engineer SKA-SA 3rd Floor The Park Park Road Pinelands 7405 Tel: +27215067300 (W) Fax: +27215067375 (W) Cell: +27825639602
