Dear all, We have interfaced 64-channel ADC with ROACH-1 board and it is working as expected using on-board clock (50MHz). There is provision to provide an external clock to this board to operate ADC to get a maximum data rate of 65 MSPS. However, we have a few queries and need inputs on the following:
1. What should be the power level for the external clock ? 2. On the ROACH-1 side, we have x64-adc yellow block interface where we can set the ADC clock rate. Should we enter 65MHz over there? Will the default yellow block support this ? 3. If x64_adc is operated at 65MHz clock, ROACH-1 has to be operated at 4 times the ADC clock i.e. 260MHz. Should XSG_core_config settings, 'arb_clk' be set to 260 MHz? As 'arb_clk' is derived from internal clock using DCM, how is the stability of 'arb_clk' at 260MHz? Has anyone used this ? Thanks & Regards, Kaushal
