On 7/26/2017 11:43 PM, Adam Isaacson wrote: > Hi Jonathan, > > Here are the answers to 1 and 2 below: > > 1) Yes, there is a an external clock reference. There are three SMA > connectors on the SKARAB motherboard within the enclosure: AUX_CLK_IN, > AUX_SYNC_IN and AUX_SYNC_OUT. The current ADC Mezzanine Card makes use > of these interfaces. The current BSP package that we provide does not > use these interfaces, so in order to use them you would need to do > some firmware changes. You can see more about these interfaces by > reading the SKARAB Hardware Description Document, which is located in > https://github.com/ska-sa/skarab_docs (master branch). The SKARAB wiki > is officially up and running, so check out: > https://casper.berkeley.edu/wiki/SKARAB. > <https://casper.berkeley.edu/wiki/SKARAB> It contains all the relevant > links - apologies for the shameful advertising :). In order to use a > reference clock then you would need the Mezzanine 1 or 2 slot open, so > that you can feed a cable through to the SMA. Clifford, can probably > confirm this. Yes, provision is made for AUX clock/syncs on the motherboard, however the standard enclosure does not cable the AUX signals to the enclosure wall. These signals are used internally when wiring up SKARAB ADCs. A neat option may be to place bulk head connectors on one of the unused mezzanine site faceplates to cable to the motherboard SMAs. If this is just lab work, then removing one of the faceplates will create an aperture to pass a cable through (and typically won't be too detrimental to enclosure cooling at room temperature). Connecting the cable to the vertical mount AUX connectors will require that the top lid is temporarily removed, however.
Another option (a bit more work, but necessary if you want multiple external clocks) would be to pass a clocks down off mezzine boards. See the Hardware Description Document for how to do this too. 2) The SKARAB BSP package runs off the 156.25MHz clock and this is currently not configurable via the toolflow. The SKARAB motherboard has an on-board 156.25MHz LVPECL oscillator, which it uses as the main clock source.The SKARAB BSP does make provision for a user_clk, which is the toolflow clock, but right now there is only one. It would be easy enough to add another if required. You could just add another clock to the output of the user_clk MMCM and feed it into the toolflow, but this would mean firmware changes. In our case, the SKARAB is using a multi clock design, as the BSP is running off the 156.25MHz and the DSP is running off the 230MHz clock generated from the 156.25MHz clock, but I think you are referring to working with two clocks within the DSP Simulink block. > > Kind regards, > > Adam > > > > On Wed, Jul 26, 2017 at 10:19 PM, Jonathan Weintroub > <jweintr...@cfa.harvard.edu <mailto:jweintr...@cfa.harvard.edu>> wrote: > > Hi CASPER, SKARAB, JASPER collaborators, > > As much prior traffic has documented we are bring up SKARABs at > SAO, and working on a fast rate interpolator design. After > teething troubles with the SKARAB and JASPER Mark Peryer is now > successfully building, loading and running codes on SKARAB. A few > questions have come up as we dig deeper. The topics all come back > to this one design, so I will bundle them into one email, and hope > to catch some fish. > > 1. The SKARAB is internally clocked, there appears to be no > external clock reference in. Is it possible to lock the SKARAB > processing to some external reference or clock? > > 2. Does JASPER running on SKARAB support FPGA designs with > multiple clock domains? > > 3. Has anyone in the community produced non-radix-2 > demultiplexed CASPER, or, JASPER, FFT blocks? > > 4. Has anyone done CASPER or JASPER work on rate interpolation > (downsampling) with arbitrary, and unfriendly, factors? > > Thanks very much in advance for any contributions. > > Jonathan > > > > -- > You received this message because you are subscribed to the Google > Groups "casper@lists.berkeley.edu > <mailto:casper@lists.berkeley.edu>" group. > To unsubscribe from this group and stop receiving emails from it, > send an email to casper+unsubscr...@lists.berkeley.edu > <mailto:casper%2bunsubscr...@lists.berkeley.edu>. > To post to this group, send email to casper@lists.berkeley.edu > <mailto:casper@lists.berkeley.edu>. > > > > > -- > SKA_banner > > Best Regards / Vriendelike Groete > > *Adam Isaacson* > FPGA Engineer > > SKA_bannerSKA_banner > > SKA_banner (+27) 82 563 9602 SKA_banner 3rd > Floor, The Park, > Park Road, > SKA_banner (+27) 21 506 7300 Pinelands > SKA_banner (+27) 21 506 7375 7405 > SKA_banner www.ska.ac.za South Africa > > > > -- > You received this message because you are subscribed to the Google > Groups "casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send > an email to casper+unsubscr...@lists.berkeley.edu > <mailto:casper+unsubscr...@lists.berkeley.edu>. > To post to this group, send email to casper@lists.berkeley.edu > <mailto:casper@lists.berkeley.edu>. -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
