Hi, Franco, I'm not extensively familiar with the inner workings of the AGC5G yellow block, but I suspect the limitation is caused by the somewhat obscure constraints imposed by the MMCM in the Virtex 6. This limitation also affects the ADC16 yellow block. More details can be found here:
https://casper.berkeley.edu/wiki/ADC16x250-8#ADC16_Sample_Rate_vs_Virtex-6_MMCM_Limitations Hope this helps, Dave > On Sep 12, 2017, at 14:37, Franco <francocuro...@gmail.com> wrote: > > Dear Casperites, > > Recently I've been testing adc5g block for different compilation frequency, I > figured that the block can be compiled at [540, 960] U [1080, 2500] MHz, for > every other frequency it gives you a "An optimum PLL solution is not > available!" error. This restrictions come from the Matlab script > 'xps_adc5g.m' that generates the block. The block does some computation I > don't understand to to set the PLL parameters (or fails to do). Does someone > has information about why this block has that particular behavior? I want to > compile a model at 1000MHz, and I wonder if it is possible. > > Many Thanks, > > Franco Curotto > > -- > You received this message because you are subscribed to the Google Groups > "casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to casper+unsubscr...@lists.berkeley.edu. > To post to this group, send email to casper@lists.berkeley.edu. -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
