hi niel, oops, i just re-read your email and my undestanding is that you are digitizing complex IQ data at 1 Gsps for I and 1 Gsps for Q (1 GHz bandwidth).
so please cut my numbers in my email from a few minutes ago (appended below) in half: you can get ~512 signals digitized (or brought in from 512 external 1 bit digitizers) on a large FGPA, but that's only 256 complex signals, or 128 dual pol antennas. i think the correlator for this many signals will fit in a large FPGA, but as i mentioned, only if you have a very small number of spectral channels... best wishes, dan On Sat, Nov 11, 2023 at 12:22 PM Dan Werthimer <d...@ssl.berkeley.edu> wrote: > > hi neil, > > by number of receiver channels, i presume you mean number of antennas? > are these single or dual polarization? > > how many spectral channels do you need in your correlator ? > > for a large number of spectral channels, > you'll likely want to use an FX architecture correlator (not XF). > in an FX correlator the number of ADC bits doesn't change the FPGA > utilization for the DSP very much. > > one fun thing you can do with a 1 bit correlator, is use the LVDS > differential inputs on the FPGA as 1 Gsps digitizers. on a large FPGA > with a lot of pins you can get about 512 ADC's > (256 antennas, dual pol) built into the FPGA, so the FPGA can be your > digitizer and your correlator... > > if you only need a small number of spectral channels, you could build an > XF correlator > with ~512 inputs... (~256 antennas, dual pol, or ~512 antennas single > pol) in a large FPGA. > > with an XF architecture, the FPGA utilization is J x > number_of_spectral_channels. > for FX, the utilization goes as K x log_base_2(spectral_channels). > > but constant K >> constant J, > so sometimes (rarely) it is better to use XF, depending on the number of > spectral channels. > > > best wishes, > > dan > > > > On Sat, Nov 11, 2023 at 11:47 AM salmon.na via casper@lists.berkeley.edu < > casper@lists.berkeley.edu> wrote: > >> For a paper on non-radioastronomy aperture synthesis technology I need to >> know how many receiver channels can run into an almost top of the range >> FPGA optimally designed single-bit cross-correlator running a 2 Gbps. So >> each receiver is digitised (sine and cosine) in single bits 1 Gbps. I’m >> wondering if there are scaling laws for this and I only need to have a ball >> park figure, ie a precision of say a factor of three or thereabouts. Any >> associate papers related to that which might have clues to the capabilities >> would be helpful. >> >> >> >> Many thanks, >> >> Neil Salmon >> >> -- >> You received this message because you are subscribed to the Google Groups >> "casper@lists.berkeley.edu" group. >> To unsubscribe from this group and stop receiving emails from it, send an >> email to casper+unsubscr...@lists.berkeley.edu. >> To view this discussion on the web visit >> https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/005601da14d7%24ede171b0%24c9a45510%24%40tiscali.co.uk >> <https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/005601da14d7%24ede171b0%24c9a45510%24%40tiscali.co.uk?utm_medium=email&utm_source=footer> >> . >> > -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To view this discussion on the web visit https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CAGHS_vF_HR1NS93LBvngOqQhQcwTCMe%3Dy4F5RCYy398WYUxX0Q%40mail.gmail.com.
