On 7/13/17, 4:38 AM, "cctalk on behalf of Robert via cctalk" <cctalk-boun...@classiccmp.org on behalf of cctalk@classiccmp.org> wrote:
>It does look like that last column (or possibly two) is missing, >doesn't it? Going back to the info on your excellent site, the shift >register does seem a good candidate. If we assume that it is parallel >in, serial out, then the problem would have to be on the input side, >as all the bits pass through every flip flop (ruling them out) and the >output is flawed absolutely consistently (ruling out an intermittent >fault there). The same reasons militate against a serial input, I >think. Only the last bit to shift out of the register will have passed through all flip-flops; numbering the flip-flops in such a way that the flip-flop furthest away from the output is the first flip-flop, a single missing bit at the end of output could indicate a problem with either the output of the first flip-flop, or the input of the second flip-flop. If two bits are missing at the end, output of second flip-flop or input of third flip-flop. Camiel.
