> -----Original Message----- > From: Phil Blundell [mailto:p...@pbcl.net] > Sent: 28 July 2017 18:27 > To: r...@jarratt.me.uk; Rob Jarratt <robert.jarr...@ntlworld.com>; General > Discussion: On-Topic and Off-Topic Posts <cctalk@classiccmp.org> > Subject: Re: DECstation 220 Impasse Reached > > On Fri, 2017-07-28 at 18:04 +0100, Rob Jarratt via cctalk wrote: > > Anyone have any thoughts on whether those data signals look right? > > It doesn't look obviously wrong. If the vertical scale is 2V per box then the > amplitude is probably about right for 74LS logic. I think you said this was > on a > shared data bus and the little glitch might well be a benign artifact (either > bus > turnaround or just a reflection of some internal logic in whatever chip was > driving the bus at the time). > > But it's quite hard to say anything very intelligent about that signal based > on > just one waveform in isolation. >
Thanks, I wasn't too concerned about the actual levels as they seemed fine for 74LS as you say. I did wonder if the "roughness" of the signal was anything to do with transmission line effects. The top of the waveform is not very flat. On other pins I do see a long curving rise as well. It sounds like I may be able to consider this a fairly normal signal. Regards Rob