> From: David Bridgham dab at froghouse.org
> I'm going to have enough fun with trying to implement the USB stack in
> the FPGA
ISTR discussing putting a PDP-11 into the FPGA (there are Verilog PDP-11's
available), so we could write our USB code in C (I'd use the Unix V6 compiler
to compile it, of course :-).
> From: Phil Blundell
> I doubt you really need the hard gold fingers on a prototype board.
Good point...
> Not that I've ever actually built a Unibus card though so perhaps there
> is some complexity or something especially hostile about the sockets
> that I'm not realising.
Nah, not that I can think of.
> From: Emanuel Stiebler
> From an old email from Tim Shoppa who tested some QBUS SCSI controllers:
> ...
> Here are the peak data rates measured
I suspect the disk drive itself may be a big factor there. E.g. the PDP-11
Peripherals Handbook lists the RK05 speed as 11 usec/word, so about 1.5
Mbit/second.
But I _know_ the UNIBUS is a lot faster than that; to verify that, look at
the speed of non-cache PDP-11s (on which most instructions are
memory-bandwidth - AKA UNIBUS bandwidth - limited).
And even if not, the controller may have been engineered to not use
more than a certain %-age of the bus, to avoid blowing the CPU out of
the water when it starts running.
The 'maximum bus bandwith' is a very tricky concept - how much do you leave
for the CPU, how many DMA cycles do you do per bus acquisition, etc, etc.
Noel
