On 5/21/2020 6:45 AM, emanuel stiebler wrote: > On 2020-05-20 22:22, Jay Jaeger via cctalk wrote: >> As I wrote in my last post, but write here for use as a separate thread: >> >> I'd be interesting in hearing from folks what toolsets they have used >> for HDL (VHDL in particular). I started with Xilinx ISE and then >> graduated to Vivado for later chipsets - unfortunately, Vivado seems to >> be something of a dog, in terms of time to compile HDL and synthesize logic. > > I feel your pain ;-) > > To deal with the ISE<->Vivado speeds, we always chose a target which is > supported on both. One of the reasons, I have the artix7-100 on all my > boards, makes life much easier. > Then just use ISE for the "quick around" time, and vivado for the tough > stuff. >
That's a great suggestion. Fortunately, I do have experience with the DLL fix for ISE, which they no longer support, so I can run ISE if I want to. And, hey, if the design fits, I even have an older Nexsys 2 to fit it to. > Vivado was pretty much useless in the first revisions, but now it is at > a stage, where it is really usable. Yes, it is slow :( Even that confirmation is helpful. ;) > On the other hand, the simulator in Vivado got much better, and works > for both, Verilog & VHDL, and also in mixed mode, which helps a lot. > > And it is tough to complain about a free tool, which runs on Linux & Win ... > As a hobbyist, I agree. If I were doing this stuff professionally, in quantity, I'd be all over them like a wet blanket just from a standpoint of lost productive time. I suspect that if either one, Intel/Altera or Xilinx came up with a substantially more productive toolchain, it could move the needle on market share. > A lot of guys I know, use also GHDL for simulations, if command line is > your thing. > I have seen that suggestion from another correspondent on the list as well, and I think it is a good one, likely to save lots of time. I don't mind command lines - I go all the way back through UNIX 6th edition to card decks. ;) Thanks. JRJ