I call complete BS on Bunnie Huang's notion that both the way the HDL
module is written and the lack of area optimization is due to some
nefarious intent to sell bigger silicon by Xilinx. I'm really not a fan
of that guy so maybe my glasses are tinted anti-rose. But the design of
large HDL modules like their DDR controller and PCI Express cores are
written to be as flexible as possible to the largest set of
applications. People code 'code' and thus it is always subject to
design over-sights and mistakes. Actually Lattice has some of the most
bloated and abstracted code I've seen from the bigger 4 vendors. The
lack of a compile time flag to turn off the sub-bridge was most likely
an oversight.
Xilinx and Intel/Altera's main customer base are large customers that
buy expensive chips. Their canned IP is always going to be designed for
those larger applications first.
He also makes the assertion Vivado declined to optimize out that
sub-module when all it's inputs were at deterministic levels. I find
that impossible to believe. IMPOSSIBLE. The tools just don't do that.
It's 1000 times more likely there was a path in the code that he missed
that was causing a logic inference that cascaded throughout that module.
Yet he immediately jumped to the conclusion Xilinx was just after more
money - the main reason I think that guy is a class A tool.
I'm a fan of the FOSS toolchains for Lattice ice40 and ESP5 parts
myself. But not for the reasons you argue. We can arm-wrestle over it
later.
-A
On 2020-05-21 09:23, David Kuder via cctalk wrote:
I've taken to using parts supported by the open source toolchains & IP,
that mostly limits me to using Lattice parts, but the efficiencies
obtained
from not instancing all the extra garbage from a vendor's IP library is
worth it. When you use the vendor tools, they want to waste as many
gates
as they can get away with so you buy larger more expensive parts. The
open
source toolchains optimize out stuff that would just get left dangling.
https://www.bunniestudios.com/blog/?p=5018 gives a good overview of
what
this can look like and the NeTV2 is a project that uses the migen/litex
toolchain well.
On Thu, May 21, 2020, 7:34 AM Sytse van Slooten via cctalk <
[email protected]> wrote:
