On 2023-02-02 8:25 a.m., Paul Koning via cctalk wrote:
As Will pointed out, cores are fairly large storage elements, and their
switching speeds are more modest. Not necessarily quite so modest, though --
the CDC 6600 mainframes in 1964 had memory cycling at 1 MHz rate, which means
the basic operation (read and restore) takes only a few hundred nanoseconds. I
think the main limitation in that case wasn't so much the cores as rather the
difficulty of driving pulses 100 or so ns wide through a higly inductive load.
There are some unusual circuit tricks in those memories to reduce that problem
compared to the more common 4-wire designs.
paul
I suspect heating effects, from the current could lead to more problems
on wire and solder, than the core switching.
