I used a logic analyser to check the 8228 and it does appear to be working as expected as can be seen here https://rjarratt.files.wordpress.com/2023/07/8228-operation.jpg. The labels are not very clear, but the 3rd from top is the WR input and the 4th from top is the I/O W output. So it does look like it is working.
The odd thing is that I can't pick this up with my DSO. I have tried messing with the trigger, but I just can't pick up anything that shows I/O W going low. I am using -ve edge triggers. I have tried a pulse trigger with a width >20ns and I have tried nth edge trigger, neither of the latter two ever trigger. Obviously it is my method that is wrong, but I really don't know what it is about my method that is wrong. Are there any common mistakes that novices make? Thanks > -----Original Message----- > From: Rob Jarratt <[email protected]> > Sent: 09 July 2023 20:51 > To: 'Jonathan Chapman' <[email protected]>; [email protected]; > 'General Discussion: On-Topic and Off-Topic Posts' <[email protected]> > Subject: RE: [cctalk] Re: VT100: Datasheet for Intel 8228 > > Thanks for confirming that HLDA doesn't need to be asserted at this stage. > > I looked at the address trace and matched it to the disassembled ROM. My > ROM image compares to another ROM image that has been posted online at > 9track.net, so I am fairly confident that the CPU and ROM are OK. > > I don't think that the RAM test is passing though, it might not even be able > to > start it, I have not traced this sufficiently to be sure, but it is in a loop > at one > point, but not before sending data to the keyboard UART. That is what made > me look at the 8228 because I traced back that far to where something did > not seem be happening correctly. > > In fact, I now realise that I should have checked MEM WR and MEM RD. I can > see that MEM WR is never asserted, but MEM RD is asserted. I do see WR > being asserted on the input side immediately after startup, but then it isn't > asserted again. > > It is possible that the firmware is in a loop before it gets to the RAM test, > possibly because the 8228 driver is not working. > > Regards > > Rob > > > -----Original Message----- > > From: Jonathan Chapman <[email protected]> > > Sent: Sunday, July 9, 2023 5:18 PM > > To: [email protected]; General Discussion: On-Topic and Off-Topic > > Posts <[email protected]> > > Subject: Re: [cctalk] Re: VT100: Datasheet for Intel 8228 > > > > HLDA should be deasserted, that puts the processor in a DMA mode where > > it releases all the control signals. > > > > I/O W is asserted low when OUT is high and the low WR pulse comes > along. > > It's both status and timing, coming out of the 8228. > > > > You would probably do well seeing if MEMR and MEMW are asserting. If > > the program is running off due to e.g. bad RAM, ROM bitrot, etc. you > > may never see the I/O lines assert. > > > > Thanks, > > Jonathan > > > > ------- Original Message ------- > > On Sunday, July 9th, 2023 at 12:12, Rob Jarratt via cctalk > > <[email protected]> wrote: > > > > > > > > > > > > > Actually I have just found a more detailed description in the Intel > > > 8080 Microcomputer Systems Users Manual 1975, but it still doesn't > > > tell me exactly how it works. It isn't completely clear to me if it > > > needs HLDA to be asserted for I/O W to be asserted. > > > > > > > -----Original Message----- > > > > From: Rob Jarratt via cctalk [email protected] > > > > Sent: Sunday, July 9, 2023 4:39 PM > > > > To: General Discussion: On-Topic and Off-Topic Posts > > > > [email protected] > > > > Cc: Rob Jarratt [email protected] > > > > Subject: [cctalk] VT100: Datasheet for Intel 8228 > > > > > > > > Hello, > > > > > > > > I have a non-functioning VT100. I think I may have isolated the > > > > problem to > > > > > > an > > > > > > > Intel 8228 chip (or 88228, the schematic says 8228, the part is > > > > marked 88228C). Certainly, the part gets a bit hot and it doesn't > > > > seem to be outputting anything on the I/O W pin (pin 27) despite > > > > activity on STSTB > > > > > > (pin > > > > > > > 1), DBIN (pin 4) and WR (Pin 3). There is no activity on the HLDA > > > > input though, but I am not sure if that is required because I > > > > think the firmware > > > > > > is > > > > > > > just trying to send its status to the keyboard LEDs. > > > > > > > > I can find a brief datasheet for the 8228 but it doesn't tell me > > > > the logic > > > > > > for > > > > > > > producing the I/O W signal, so I am not sure if it is behaving as > > > > it > > > > > > should. > > > > > > > Does anyone have more comprehensive information on how the 8228 is > > > > supposed to work? > > > > > > > > I have dumped the ROMs and been able to capture the ROM reads and > > > > they match the disassembled code, so I think the 8080 CPU itself > > > > is > > working. > > > > > > > > Thanks > > > > > > > > Rob
