Another possible approach is to trigger the logic analyser on a write access to that ram address, preferably with the probes on the ram itself. Look at the resulting captures .. does it seem consistent with the code and other accesses ?
On Sun, Oct 8, 2023 at 12:35 PM Adrian Godwin <artgod...@gmail.com> wrote: > Do you have one of those eprom programmers which also do device checks ? > They might do a check of the supposed faulty ram out of circuit. If you > don't have one you could probably write one for any convenient device you > have to hand such as an arduino. Exercising the ram with port writes will > be painfully slow compared with a normal ram test but with only 2K to test > it shouldn't take too long. > > > On Sun, Oct 8, 2023 at 9:35 AM Rob Jarratt via cctalk < > cctalk@classiccmp.org> wrote: > >> >> >> > -----Original Message----- >> > From: wrco...@wrcooke.net <wrco...@wrcooke.net> >> > Sent: 08 October 2023 04:15 >> > To: r...@jarratt.me.uk; Rob Jarratt via cctalk <cctalk@classiccmp.org> >> > Subject: Re: [cctalk] VT100: Failing 2114 Chip Replaced With One With >> The >> > Same Fault >> > >> > >> > >> > > On 10/07/2023 5:35 PM CDT Rob Jarratt via cctalk < >> cctalk@classiccmp.org> >> > wrote: >> > > >> > > >> > > I find this really hard to explain. It can't be the chip selection >> > > logic because then the addresses 0x2400-0x2407 would also fail and I >> > > checked the CS signal with the logic analyser just to be sure. I also >> > > checked the address lines directly on the RAM chip for any stuck bits >> > > and they seemed fine too. >> > > >> > > >> > > >> > > What are the chances of two 2114 chips failing at exactly the same >> address? >> > > Is there some failure mode I might not be considering? >> > > >> > > Rob >> > >> > Perhaps it isn't the 2114 or its associated circuit at all. Maybe some >> other >> > device is being incorrectly selected by that address and driving (half) >> the bus >> > low? Just a thought. >> >> Many thanks for the suggestion. This hadn't crossed my mind, so I >> checked. All the things that I could identify on the schematic that connect >> to the bus (UART, interrupt vector, flag buffer and modem signals) seem not >> to be enabled. I have looked at what is sinking the data bus, there is a >> buffer which seems to be OK and the 8251 PIC. The PIC is harder to check >> but I can see it is not selected and the input pins don’t appear to be >> shorted. >> >> Not really sure what else to consider. >> >> > >> > Will >> > >> > If you want to build a ship, don't drum up people to collect wood and >> don't >> > assign them tasks and work, but rather teach them to long for the >> endless >> > immensity of the sea. >> > >> > Antoine de Saint-Exupery >> >>
