> On Nov 3, 2024, at 3:55 PM, Chuck Guzis via cctalk <cctalk@classiccmp.org>
> wrote:
>
> On 11/3/24 10:06, David Wise via cctalk wrote:
>> 1620 owner here.
>>
>> Sure there are ways to cause a CHECK STOP, and one-instruction infinite
>> loops, including the IBM-sanctioned one you describe below - which everyone
>> used all day to clobber core - but that's all they are, they don't damage
>> hardware.
>>
>> You can make an infinite loop that is sort of less than one instruction.
>> It's an instruction with a self-referencing indirect address. (Only applies
>> to Model II, and Model I machines with the Indirect Addressing feature
>> installed, like mine.) When it tries to fetch the indirect operand, it
>> loops in the Fetch cycle without ever reaching Execute stage. While that
>> sounds like a core hammer, it is still less than 30% duty cycle on any one
>> address. Also remember the core stack has air blowing through it nonstop.
>
> Sure, there was more than one way to, say, clear memory on a 1620 with a
> single instruction--and it was common knowledge. One could use a
> transmit record or transmit field instruction that not only over-wrote
> general memory, but also clobbered the instruction itself.
>
> Such is the glory of variable field/record length architectures.
Yes, but you don't need such an architecture for this. A PDP-11 can do it
also. I once assigned that as a a pair of homework questions in an assembly
language programming course:
1. Show a one-word PDP-11 program that writes all of memory, in reverse order.
2. Show a one-word PDP-11 program that clears all of memory, in forward order,
halting on completion.
paul
