Author: rsmith Date: Thu Oct 10 14:40:56 2019 New Revision: 374457 URL: http://llvm.org/viewvc/llvm-project?rev=374457&view=rev Log: Fix some errors in <arm_neon.h> tests that cause them to fail with lax vector conversions disabled.
Modified: cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c cfe/trunk/test/CodeGen/arm64-vrnd.c Modified: cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c?rev=374457&r1=374456&r2=374457&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c (original) +++ cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c Thu Oct 10 14:40:56 2019 @@ -146,14 +146,14 @@ int16x8_t test_vcvtq_s16_f16 (float16x8_ // CHECK-LABEL: test_vcvt_u16_f16 // CHECK: [[VCVT:%.*]] = fptoui <4 x half> %a to <4 x i16> // CHECK: ret <4 x i16> [[VCVT]] -int16x4_t test_vcvt_u16_f16 (float16x4_t a) { +uint16x4_t test_vcvt_u16_f16 (float16x4_t a) { return vcvt_u16_f16(a); } // CHECK-LABEL: test_vcvtq_u16_f16 // CHECK: [[VCVT:%.*]] = fptoui <8 x half> %a to <8 x i16> // CHECK: ret <8 x i16> [[VCVT]] -int16x8_t test_vcvtq_u16_f16 (float16x8_t a) { +uint16x8_t test_vcvtq_u16_f16 (float16x8_t a) { return vcvtq_u16_f16(a); } @@ -167,7 +167,7 @@ int16x4_t test_vcvta_s16_f16 (float16x4_ // CHECK-LABEL: test_vcvta_u16_f16 // CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtau.v4i16.v4f16(<4 x half> %a) // CHECK: ret <4 x i16> [[VCVT]] -int16x4_t test_vcvta_u16_f16 (float16x4_t a) { +uint16x4_t test_vcvta_u16_f16 (float16x4_t a) { return vcvta_u16_f16(a); } Modified: cfe/trunk/test/CodeGen/arm64-vrnd.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64-vrnd.c?rev=374457&r1=374456&r2=374457&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/arm64-vrnd.c (original) +++ cfe/trunk/test/CodeGen/arm64-vrnd.c Thu Oct 10 14:40:56 2019 @@ -1,22 +1,22 @@ -// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -flax-vector-conversions=none -emit-llvm -o - %s | FileCheck %s #include <arm_neon.h> -int64x2_t rnd5(float64x2_t a) { return vrndq_f64(a); } +float64x2_t rnd5(float64x2_t a) { return vrndq_f64(a); } // CHECK: call <2 x double> @llvm.trunc.v2f64(<2 x double> -int64x2_t rnd9(float64x2_t a) { return vrndnq_f64(a); } +float64x2_t rnd9(float64x2_t a) { return vrndnq_f64(a); } // CHECK: call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double> -int64x2_t rnd13(float64x2_t a) { return vrndmq_f64(a); } +float64x2_t rnd13(float64x2_t a) { return vrndmq_f64(a); } // CHECK: call <2 x double> @llvm.floor.v2f64(<2 x double> -int64x2_t rnd18(float64x2_t a) { return vrndpq_f64(a); } +float64x2_t rnd18(float64x2_t a) { return vrndpq_f64(a); } // CHECK: call <2 x double> @llvm.ceil.v2f64(<2 x double> -int64x2_t rnd22(float64x2_t a) { return vrndaq_f64(a); } +float64x2_t rnd22(float64x2_t a) { return vrndaq_f64(a); } // CHECK: call <2 x double> @llvm.round.v2f64(<2 x double> -int64x2_t rnd25(float64x2_t a) { return vrndxq_f64(a); } +float64x2_t rnd25(float64x2_t a) { return vrndxq_f64(a); } // CHECK: call <2 x double> @llvm.rint.v2f64(<2 x double> _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits