amyk added inline comments.
================ Comment at: llvm/test/CodeGen/PowerPC/fast-isel-fcmp-nan.ll:5 ; CHECK-LABEL: TestULT: -; CHECK: xscmpudp +; CHECK: fcmpu ; CHECK: blr ---------------- nemanjai wrote: > Why do we not emit the VSX instructions here any longer? How are crbits > related? Nemanja and I discussed this outside of the revision. This test case is ran with FastISel by default. It looks like for fcmp ULT/UEQ/UGT/OLE/ONE/OGE, we're not able to find a compare predicate, so we don't use FastIISel for these changed test cases. With my patch (turning on CR bits), we end up matching to fcmpu in the td patterns, but when CR bits are not present, we match to the VSX instructions in PPCISelDAGToDAG. This should be something we investigate at a later date. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124060/new/ https://reviews.llvm.org/D124060 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
