jhuber6 added a comment. In D141717#4052753 <https://reviews.llvm.org/D141717#4052753>, @tra wrote:
> In D141717#4052587 <https://reviews.llvm.org/D141717#4052587>, @jhuber6 wrote: > >> Well you'll get textual output for the host output, but the device code >> embedded in the host module will be bitcode instead. So the final output >> from the compiler is still textual IR. It just won't be some weird global >> like this >> >> This is bad because it can't be handled by LTO or anything else. It makes >> the resulting IR file difficult to use for its intended purpose. > > I understand your use case and I do agree that you do need the embedded IR to > be binary. > > It appears to me that the real problem here is that "-S" should not have > been propagated to the GPU sub-compilation. > > The fact that producing binary IR works for you seems to be just a > coincidence. What if the user would specify "-E" instead? I think the right > fix would be to tell compiler to generate the right kind of output, not try > to tell it to produce textual assembly and undo the "textual" part somewhere > downstream. For `-E` we don't embed anything, so I think we just ignore the device portion unless they used `--offload-device-only`. And I don't think we have access to any "per-toolchain" options at this point in the compilation phase. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D141717/new/ https://reviews.llvm.org/D141717 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
