kito-cheng added inline comments.
================
Comment at:
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vreinterpret.c:1
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 2
// REQUIRES: riscv-registered-target
----------------
` UTC_ARGS: --version 2`?
================
Comment at:
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vreinterpret.c:10-13
+// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8>
@test_vreinterpret_v_i8mf8_u8mf8
+// CHECK-RV64-SAME: (<vscale x 1 x i8> [[SRC:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-RV64-NEXT: entry:
+// CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[SRC]]
----------------
Why their are so many unrelated diff?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149642/new/
https://reviews.llvm.org/D149642
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
