Author: Amr Hesham
Date: 2025-05-21T18:46:57+02:00
New Revision: 584616c878f8d99c6862aa51d2ff7bf191e98727

URL: 
https://github.com/llvm/llvm-project/commit/584616c878f8d99c6862aa51d2ff7bf191e98727
DIFF: 
https://github.com/llvm/llvm-project/commit/584616c878f8d99c6862aa51d2ff7bf191e98727.diff

LOG: [CIR][LLVMLowering] Upstream Bitcast lowering (#140774)

This change adds support for lowering BitCastOp

Added: 
    

Modified: 
    clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    clang/test/CIR/CodeGen/cast.cpp

Removed: 
    


################################################################################
diff  --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp 
b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
index 365569ce1f48a..3a94806c3af7c 100644
--- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
@@ -530,10 +530,18 @@ mlir::LogicalResult 
CIRToLLVMCastOpLowering::matchAndRewrite(
                                                         llvmSrcVal);
     return mlir::success();
   }
-  case cir::CastKind::bitcast:
+  case cir::CastKind::bitcast: {
+    mlir::Type dstTy = castOp.getType();
+    mlir::Type llvmDstTy = getTypeConverter()->convertType(dstTy);
+
     assert(!MissingFeatures::cxxABI());
     assert(!MissingFeatures::dataMemberType());
-    break;
+
+    mlir::Value llvmSrcVal = adaptor.getOperands().front();
+    rewriter.replaceOpWithNewOp<mlir::LLVM::BitcastOp>(castOp, llvmDstTy,
+                                                       llvmSrcVal);
+    return mlir::success();
+  }
   case cir::CastKind::ptr_to_bool: {
     mlir::Value llvmSrcVal = adaptor.getOperands().front();
     mlir::Value zeroPtr = rewriter.create<mlir::LLVM::ZeroOp>(

diff  --git a/clang/test/CIR/CodeGen/cast.cpp b/clang/test/CIR/CodeGen/cast.cpp
index dd3ea8f8f02b2..9da72cd35d963 100644
--- a/clang/test/CIR/CodeGen/cast.cpp
+++ b/clang/test/CIR/CodeGen/cast.cpp
@@ -25,7 +25,6 @@ unsigned char cxxstaticcast_0(unsigned int x) {
 // LLVM: %[[R:[0-9]+]] = load i8, ptr %[[RV]], align 1
 // LLVM: ret i8 %[[R]]
 
-
 int cStyleCasts_0(unsigned x1, int x2, float x3, short x4, double x5) {
 // CIR: cir.func @_Z13cStyleCasts_0jifsd
 // LLVM: define i32 @_Z13cStyleCasts_0jifsd
@@ -103,10 +102,24 @@ void should_not_cast() {
 
   bool x2;
   bool ib = (bool)x2; // identity
-  
+
   (void) ib; // void cast
 }
 
 // CIR:     cir.func @_Z15should_not_castv
 // CIR-NOT:   cir.cast
 // CIR:     cir.return
+
+typedef int vi4 __attribute__((vector_size(16)));
+typedef double vd2 __attribute__((vector_size(16)));
+
+void bitcast() {
+  vd2 a = {};
+  vi4 b = (vi4)a;
+}
+
+// CIR: %[[D_VEC:.*]] = cir.load {{.*}} : !cir.ptr<!cir.vector<2 x 
!cir.double>>, !cir.vector<2 x !cir.double>
+// CIR: %[[I_VEC:.*]] = cir.cast(bitcast, %[[D_VEC]] : !cir.vector<2 x 
!cir.double>), !cir.vector<4 x !s32i>
+
+// LLVM: %[[D_VEC:.*]] = load <2 x double>, ptr {{.*}}, align 16
+// LLVM: %[[I_VEC:.*]] = bitcast <2 x double> %[[D_VEC]] to <4 x i32>


        
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