================
@@ -64,3 +65,157 @@ void CIRGenFunction::emitAnyExprToExn(const Expr *e,
Address addr) {
// Deactivate the cleanup block.
assert(!cir::MissingFeatures::ehCleanupScope());
}
+
+mlir::LogicalResult CIRGenFunction::emitCXXTryStmt(const CXXTryStmt &s) {
+ auto loc = getLoc(s.getSourceRange());
+
+ // Create a scope to hold try local storage for catch params.
+ mlir::OpBuilder::InsertPoint scopeIP;
+ cir::ScopeOp::create(builder, loc, /*scopeBuilder=*/
+ [&](mlir::OpBuilder &b, mlir::Location loc) {
+ scopeIP = builder.saveInsertionPoint();
+ });
+
+ mlir::LogicalResult result = mlir::success();
+ {
+ mlir::OpBuilder::InsertionGuard guard(builder);
+ builder.restoreInsertionPoint(scopeIP);
+ result = emitCXXTryStmtUnderScope(s);
+ cir::YieldOp::create(builder, loc);
+ }
+
+ return result;
+}
+
+mlir::LogicalResult
+CIRGenFunction::emitCXXTryStmtUnderScope(const CXXTryStmt &s) {
+ const llvm::Triple &t = getTarget().getTriple();
+ // If we encounter a try statement on in an OpenMP target region offloaded to
+ // a GPU, we treat it as a basic block.
+ const bool isTargetDevice =
+ (cgm.getLangOpts().OpenMPIsTargetDevice && (t.isNVPTX() ||
t.isAMDGCN()));
+ if (isTargetDevice) {
+ cgm.errorNYI(
+ "emitCXXTryStmtUnderScope: OpenMP target region offloaded to GPU");
+ return mlir::success();
+ }
+
+ auto hasCatchAll = [&]() {
+ if (!s.getNumHandlers())
+ return false;
+ unsigned lastHandler = s.getNumHandlers() - 1;
+ return s.getHandler(lastHandler)->getExceptionDecl() == nullptr;
----------------
andykaylor wrote:
Are we guaranteed that the AST will represent them in the order in which they
appear in the source? It probably will, but I'm not sure we can count on it.
Also, all the OGCG code I looked at will handle a catch-all handler in any
position.
https://github.com/llvm/llvm-project/pull/162528
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