topperc wrote:

Why are the built in’s using a different naming than the spec? The spec has 
i32x2 but the builtins use v2i32?

I hope we can use operator+ and operator- on vector types so we don’t need any 
builtins for padd/psub.

https://github.com/llvm/llvm-project/pull/174068
_______________________________________________
cfe-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Reply via email to