sihuan wrote: > Why are the built in’s using a different naming than the spec? The spec has > i32x2 but the builtins use v2i32? > > I hope we can use operator+ and operator- on vector types so we don’t need > any builtins for padd/psub.
I apologize for the confusion caused by the naming. The use of `v2i32` was a result of my over-complicated design of mapping spec names to internal builtins. I will switch to using `operator+` and `operator-` for `padd` and `psub`, and remove these builtins. > This spec is one of two proposals I’m aware of for intrinsics. The mailing > list has not made any decision about which will move forward. Thank you for the heads-up. I’ve been following the mailing list and am aware of the ongoing discussions regarding the two proposals. My original intention was just to set up the initial path for P-ext intrinsics, but now I realize that `padd`/`psub` was not the best choice for this purpose. I’ve switched this PR to a Draft for now and will continue to monitor the mailing list. https://github.com/llvm/llvm-project/pull/174068 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
