================
@@ -181,6 +181,14 @@ class InlineAsm final : public Value {
bool hasArg() const {
return Type == isInput || (Type == isOutput && isIndirect);
}
+
+ /// hassRegMemConstraints - Returns true if and only if the constraint
+ /// codes are "rm". This is useful when converting between a register form
+ /// to a memory form.
----------------
nikic wrote:
This applies to many similar checks: Why are we making this specific to `rm`?
Wouldn't this also work if for example the `r` is a more specific register
class?
https://github.com/llvm/llvm-project/pull/92040
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