[clang] [CIR][NEON] Add lowering support for `vceqzd_s64` (PR #179779)

[Andrzej Warzyński via cfe-commits]

================
@@ -88,6 +88,45 @@ findARMVectorIntrinsicInMap(ArrayRef<AArch64BuiltinInfo> 
intrinsicMap,
   return nullptr;
 }
 
+//===----------------------------------------------------------------------===//
+//  Emit-helpers
+//===----------------------------------------------------------------------===//
+mlir::Value
+CIRGenFunction::emitAArch64CompareBuiltinExpr(mlir::Location loc,
+                                              mlir::Value src, mlir::Type 
retTy,
+                                              const cir::CmpOpKind kind) {
+
+  bool scalarCmp = !isa<cir::VectorType>(src.getType());
+  if (!scalarCmp) {
+    assert(cast<cir::VectorType>(retTy).getIsScalable() &&
+           "This is only intended for fixed-width vectors");
+    // Vector retTypes are cast to i8 vectors. Recover original retType.
+    cgm.errorNYI(loc, std::string("unimplemented vector compare"));
+  }
+
+  mlir::Value zero = builder.getNullValue(src.getType(), loc);
+  mlir::Value cmp;
+  if (cir::isFpCompare(kind)) {
----------------
banach-space wrote:

OK, so the conversion to LLVM should handle this, makes sense 👍🏻 

https://github.com/llvm/llvm-project/pull/179779
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits