================
@@ -6557,15 +6560,28 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr
&MI, unsigned OpIdx,
(!ST.has64BitLiterals() || InstDesc.getSize() != 4))
return false;
- // FIXME: We can use sign extended 64-bit literals, but only for signed
- // operands. At the moment we do not know if an operand is signed.
- // Such operand will be encoded as its low 32 bits and then either
- // correctly sign extended or incorrectly zero extended by HW.
- // If 64-bit literals are supported and the literal will be
encoded
- // as full 64 bit we still can use it.
- if (!Is64BitFPOp && (int32_t)Imm < 0 &&
- (!ST.has64BitLiterals() || AMDGPU::isValid32BitLiteral(Imm, false)))
+ // For signed operands, we can use sign extended 32-bit literals when the
+ // value fits in a signed 32-bit integer. For unsigned operands, we
reject
+ // negative values (when interpreted as 32-bit) since they would be
+ // zero-extended, not sign-extended.
+ // If 64-bit literals are supported and the literal will be encoded
+ // as full 64 bit we still can use it.
+ if (Is64BitSignedOp) {
+ // Signed operand: 32-bit literal is valid if it fits in int32_t
+ if (!isInt<32>(static_cast<int64_t>(Imm)) &&
+ (!ST.has64BitLiterals() || AMDGPU::isValid32BitLiteral(Imm,
false)))
+ return false;
+ } else if (Is64BitUnsignedOp) {
+ // Unsigned operand: 32-bit literal is valid if it fits in uint32_t
+ if (!isUInt<32>(Imm) &&
+ (!ST.has64BitLiterals() || AMDGPU::isValid32BitLiteral(Imm,
false)))
----------------
jayfoad wrote:
Same here.
https://github.com/llvm/llvm-project/pull/186575
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