================ @@ -257,6 +257,64 @@ static cir::VectorType getNeonPairwiseWidenInputType(cir::VectorType resType, return result; } +// Derive the LLVM intrinsic's per-operand argument types and its result +// type for use when emitting the intrinsic call. +// +// `modifier` is the TypeModifier bitmask from `ARMVectorIntrinsicInfo` +// (callers pass `info.TypeModifier`; see AArch64CodeGenUtils.h). It encodes +// how the intrinsic's argument and return types relate to the builtin's +// scalar types. For SISD builtins the key flags are: +// - VectorizeArgTypes: wrap each arg type into a fixed-width vector +// - Use64BitVectors / Use128BitVectors: choose the vector width +// (when neither is set the vector has 1 element) +// - AddRetType / VectorizeRetType: analogous flags for the return type +// +// ARM.cpp lets LLVM resolve the intrinsic's signature (via +// `CGM.getIntrinsic`) and then walks the resolved Function* formal +// parameter types. CIR has no LLVMContext here, so we derive the same +// argument/result types directly from the Clang operand types. +static std::pair<mlir::Type, llvm::SmallVector<mlir::Type>> +deriveNeonIntrinsicOperandTypes(CIRGenFunction &cgf, unsigned modifier, ---------------- iamvickynguyen wrote:
I agree! Adding SISD is clearer. I've changed the name. https://github.com/llvm/llvm-project/pull/196776 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
