================ @@ -653,15 +645,20 @@ static bool canSkipModuleSplit(IRSplitMode Mode, const Module &M, } /// Performs the following steps: -/// 1. Link input device code (user code and SYCL device library code). -/// 2. Run SPIR-V code generation. +/// 1. Link all input bitcode files together with device library files. +/// 2. Optionally split the linked module according to the requested +/// IRSplitMode. +/// 3. Run SPIR-V code generation on each (split) module. +/// 4. Optionally run AOT compilation when targeting an Intel offload arch. ---------------- bader wrote:
```suggestion /// 4. Optionally run AOT compilation when targeting an Intel HW arch. ``` https://github.com/llvm/llvm-project/pull/199777 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
