================
@@ -1430,6 +1430,31 @@ mlir::LogicalResult
CIRToLLVMCastOpLowering::matchAndRewrite(
return mlir::success();
}
+mlir::LogicalResult CIRToLLVMBuiltinIntCastOpLowering::matchAndRewrite(
+ cir::BuiltinIntCastOp op, OpAdaptor adaptor,
+ mlir::ConversionPatternRewriter &rewriter) const {
+ // Both the CIR integer and the builtin integer/index lower to LLVM integer
+ // types, so this cast becomes an integer resize. Signedness is taken from
+ // the CIR integer side (the builtin/index side is treated as signless).
+ bool isUnsigned = true;
+ if (auto cirSrc = mlir::dyn_cast<cir::IntType>(op.getSrc().getType()))
+ isUnsigned = cirSrc.isUnsigned();
+ else if (auto cirDst = mlir::dyn_cast<cir::IntType>(op.getType()))
+ isUnsigned = cirDst.isUnsigned();
+
+ mlir::Value llvmSrc = adaptor.getSrc();
+ mlir::Type llvmDstTy = getTypeConverter()->convertType(op.getType());
+ auto srcIntTy = mlir::cast<mlir::IntegerType>(llvmSrc.getType());
+ auto dstIntTy = mlir::cast<mlir::IntegerType>(llvmDstTy);
+
+ // For equal widths getLLVMIntCast returns the source unchanged, which makes
+ // the common same-width cast a no-op.
----------------
jsjodin wrote:
Yes, I updated the assert so that it is more clear.
If we don't take the index types into account and I modify the assert so the
widths:
`` assert(srcWidth == dstWidth &&
"only index casts may change width during lowering");
``
The tests will trigger it:
`` Assertion `srcWidth == dstWidth && "only index casts may change width during
lowering"' failed.``
``# | PLEASE submit a bug report to
https://github.com/llvm/llvm-project/issues/ and include the crash backtrace
and instructions to reproduce the bug.``
``# | Stack dump:``
``# | 0. Program arguments:
/home/jan/git/trunk22.0/build/llvm-project/bin/cir-opt
/home/jan/git/trunk22.0/llvm-project/clang/test/CIR/Lowering/builtin-int-cast.cir
-cir-to-llvm
``
https://github.com/llvm/llvm-project/pull/201592
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