================
@@ -1511,9 +1513,42 @@ void RISCVFrameLowering::emitZeroCallUsedRegs(BitVector
RegsToZero,
} else if (TRI.isFPRegister(Reg)) {
if (MCRegister MaybeReg = getLargestFPRegisterOrZero(STI, TRI, Reg))
FinalRegsToZero.set(MaybeReg.id());
+ } else if (RISCVRegisterInfo::isRVVRegClass(
+ TRI.getMinimalPhysRegClass(Reg))) {
+ if (!STI.hasVInstructions())
+ continue;
+ HasVRegister = true;
+
+ for (MCRegister SubReg : TRI.subregs_inclusive(Reg)) {
+ if (TRI.subregs(SubReg).empty())
+ FinalRegsToZero.set(SubReg.id());
+ }
}
}
+ if (HasVRegister) {
+ RISCVVType::VLMUL VLMUL = RISCVVType::encodeLMUL(1, /*Fractional=*/false);
+ unsigned VTypeImm = RISCVVType::encodeVTYPE(
+ VLMUL, /*SEW=*/32, /*TailAgnostic=*/false, /*MaskAgnostic=*/false);
+
+ MCRegister TemporaryReg = RISCV::X5;
+ for (MCRegister Reg : FinalRegsToZero.set_bits()) {
+ if (TRI.isGeneralPurposeRegister(MF, Reg)) {
+ TemporaryReg = Reg;
+ break;
+ }
+ }
----------------
LucasChollet wrote:
> I think it should probably just assert if there's no reg available in
> FinalRegsToZero.
That's an easy way to crash the compiler. Each one of the `used*` test cases
would hit that assertion.
> If there are no GPR registers used is it definitely safe to write to x5?
Under normal the ISA calling convention, I think it is, but I didn't know
`-ffixed-x5` was a thing. I modified the code to use a `RegScavenger` so that
should solve the issue.
https://github.com/llvm/llvm-project/pull/206206
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