================
@@ -203,20 +203,20 @@ define arm_aapcs_vfpcc void @test_fma_const_fold(ptr %aa,
ptr %bb) nounwind {
define arm_aapcs_vfpcc void @test_fma_canonicalize(ptr %aa, ptr %bb) nounwind {
; CHECK-LABEL: test_fma_canonicalize:
; CHECK: @ %bb.0:
-; CHECK-NEXT: vldr.16 s0, [r0]
----------------
chrisnc wrote:
This is the codegen for the v4t default CPU with the fp16 feature added to it,
so the register allocation is different than the real target (as far as I can
tell it's completely equivalent other than exchanging s0 -> s2, s2 -> s4, s4 ->
s0).
https://github.com/llvm/llvm-project/pull/213588
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