================
@@ -409,65 +427,687 @@ float fpPostInc2() {
// OGCG: store float %[[A_LOAD]], ptr %[[B]], align 4
// OGCG: %[[B_TO_OUTPUT:.*]] = load float, ptr %[[B]], align 4
-void chars(char c) {
-// CHECK: cir.func{{.*}} @_Z5charsc
+// double unary operations
+double doubleUPlus(double f) {
+ return +f;
+}
- int c1 = +c;
- // CHECK: %[[PROMO:.*]] = cir.cast integral %{{.+}} : !s8i -> !s32i
- int c2 = -c;
- // CHECK: %[[PROMO:.*]] = cir.cast integral %{{.+}} : !s8i -> !s32i
- // CHECK: cir.minus nsw %[[PROMO]] : !s32i
+// CHECK: cir.func{{.*}} @_Z11doubleUPlusd({{.*}}) -> (!cir.double{{.*}})
+// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double>
+// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]]
- // Chars can go through some integer promotion codegen paths even when not
promoted.
- // These should not have nsw attributes because the intermediate promotion
makes the
- // overflow defined behavior.
- ++c; // CHECK: cir.inc %{{.+}} : !s8i
- --c; // CHECK: cir.dec %{{.+}} : !s8i
- c++; // CHECK: cir.inc %{{.+}} : !s8i
- c--; // CHECK: cir.dec %{{.+}} : !s8i
+// LLVM: define{{.*}} double @_Z11doubleUPlusd({{.*}})
+// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+
+// OGCG: define{{.*}} double @_Z11doubleUPlusd({{.*}})
+// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+
+double doubleUMinus(double f) {
+ return -f;
+}
+
+// CHECK: cir.func{{.*}} @_Z12doubleUMinusd({{.*}}) -> (!cir.double{{.*}})
+// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double>
+// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]]
+// CHECK: %[[DBL_NEGATED:.*]] = cir.fneg %[[DBL_LOAD]]
+
+// LLVM: define{{.*}} double @_Z12doubleUMinusd({{.*}})
+// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+// LLVM: %[[DBL_NEGATED:.*]] = fneg double %[[DBL_LOAD]]
+
+// OGCG: define{{.*}} double @_Z12doubleUMinusd({{.*}})
+// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+// OGCG: %[[DBL_NEGATED:.*]] = fneg double %[[DBL_LOAD]]
+
+double doubleUPreInc(double f) {
+ return ++f;
+}
+
+// CHECK: cir.func{{.*}} @_Z13doubleUPreIncd({{.*}}) -> (!cir.double{{.*}})
+// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double>
+// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]]
+// CHECK: %[[DBL_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.double
+// CHECK: %[[DBL_INC:.*]] = cir.fadd %[[DBL_LOAD]], %[[DBL_ONE]]
+
+// LLVM: define{{.*}} double @_Z13doubleUPreIncd({{.*}})
+// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+// LLVM: %[[DBL_INC:.*]] = fadd double %[[DBL_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} double @_Z13doubleUPreIncd({{.*}})
+// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+// OGCG: %[[DBL_INC:.*]] = fadd double %[[DBL_LOAD]], 1.000000e+00
+
+double doubleUPreDec(double f) {
+ return --f;
}
-_Float16 fp16UPlus(_Float16 f) {
+// CHECK: cir.func{{.*}} @_Z13doubleUPreDecd({{.*}}) -> (!cir.double{{.*}})
+// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double>
+// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]]
+// CHECK: %[[DBL_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.double
+// CHECK: %[[DBL_DEC:.*]] = cir.fsub %[[DBL_LOAD]], %[[DBL_ONE]]
+
+// LLVM: define{{.*}} double @_Z13doubleUPreDecd({{.*}})
+// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+// LLVM: %[[DBL_DEC:.*]] = fsub double %[[DBL_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} double @_Z13doubleUPreDecd({{.*}})
+// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+// OGCG: %[[DBL_DEC:.*]] = fadd double %[[DBL_LOAD]], -1.000000e+00
+
+double doubleUPostInc(double f) {
+ return f++;
+}
+
+// CHECK: cir.func{{.*}} @_Z14doubleUPostIncd({{.*}}) -> (!cir.double{{.*}})
+// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double>
+// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]]
+// CHECK: %[[DBL_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.double
+// CHECK: %[[DBL_INC:.*]] = cir.fadd %[[DBL_LOAD]], %[[DBL_ONE]]
+
+// LLVM: define{{.*}} double @_Z14doubleUPostIncd({{.*}})
+// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+// LLVM: %[[DBL_INC:.*]] = fadd double %[[DBL_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} double @_Z14doubleUPostIncd({{.*}})
+// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+// OGCG: %[[DBL_INC:.*]] = fadd double %[[DBL_LOAD]], 1.000000e+00
+
+double doubleUPostDec(double f) {
+ return f--;
+}
+
+// CHECK: cir.func{{.*}} @_Z14doubleUPostDecd({{.*}}) -> (!cir.double{{.*}})
+// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double>
+// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]]
+// CHECK: %[[DBL_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.double
+// CHECK: %[[DBL_DEC:.*]] = cir.fsub %[[DBL_LOAD]], %[[DBL_ONE]]
+
+// LLVM: define{{.*}} double @_Z14doubleUPostDecd({{.*}})
+// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+// LLVM: %[[DBL_DEC:.*]] = fsub double %[[DBL_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} double @_Z14doubleUPostDecd({{.*}})
+// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8
+// OGCG: %[[DBL_DEC:.*]] = fadd double %[[DBL_LOAD]], -1.000000e+00
+
+// long double unary operations
+long double ldUPlus(long double f) {
+ return +f;
+}
+
+// CHECK: cir.func{{.*}} @_Z7ldUPluse({{.*}}) ->
(!cir.long_double<!cir.f80>{{.*}})
+// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init :
!cir.ptr<!cir.long_double<!cir.f80>>
+// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]]
+
+// LLVM: define{{.*}} x86_fp80 @_Z7ldUPluse({{.*}})
+// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+
+// OGCG: define{{.*}} x86_fp80 @_Z7ldUPluse({{.*}})
+// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+
+long double ldUMinus(long double f) {
+ return -f;
+}
+
+// CHECK: cir.func{{.*}} @_Z8ldUMinuse({{.*}}) ->
(!cir.long_double<!cir.f80>{{.*}})
+// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init :
!cir.ptr<!cir.long_double<!cir.f80>>
+// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]]
+// CHECK: %[[LD_NEGATED:.*]] = cir.fneg %[[LD_LOAD]]
+
+// LLVM: define{{.*}} x86_fp80 @_Z8ldUMinuse({{.*}})
+// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+// LLVM: %[[LD_NEGATED:.*]] = fneg x86_fp80 %[[LD_LOAD]]
+
+// OGCG: define{{.*}} x86_fp80 @_Z8ldUMinuse({{.*}})
+// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+// OGCG: %[[LD_NEGATED:.*]] = fneg x86_fp80 %[[LD_LOAD]]
+
+long double ldUPreInc(long double f) {
+ return ++f;
+}
+
+// CHECK: cir.func{{.*}} @_Z9ldUPreInce({{.*}}) ->
(!cir.long_double<!cir.f80>{{.*}})
+// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init :
!cir.ptr<!cir.long_double<!cir.f80>>
+// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]]
+// CHECK: %[[LD_ONE:.*]] = cir.const #cir.fp<1.000000e+00> :
!cir.long_double<!cir.f80>
+// CHECK: %[[LD_INC:.*]] = cir.fadd %[[LD_LOAD]], %[[LD_ONE]]
+
+// LLVM: define{{.*}} x86_fp80 @_Z9ldUPreInce({{.*}})
+// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+// LLVM: %[[LD_INC:.*]] = fadd x86_fp80 %[[LD_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} x86_fp80 @_Z9ldUPreInce({{.*}})
+// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+// OGCG: %[[LD_INC:.*]] = fadd x86_fp80 %[[LD_LOAD]], 1.000000e+00
+
+long double ldUPreDec(long double f) {
+ return --f;
+}
+
+// CHECK: cir.func{{.*}} @_Z9ldUPreDece({{.*}}) ->
(!cir.long_double<!cir.f80>{{.*}})
+// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init :
!cir.ptr<!cir.long_double<!cir.f80>>
+// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]]
+// CHECK: %[[LD_ONE:.*]] = cir.const #cir.fp<1.000000e+00> :
!cir.long_double<!cir.f80>
+// CHECK: %[[LD_DEC:.*]] = cir.fsub %[[LD_LOAD]], %[[LD_ONE]]
+
+// LLVM: define{{.*}} x86_fp80 @_Z9ldUPreDece({{.*}})
+// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+// LLVM: %[[LD_DEC:.*]] = fsub x86_fp80 %[[LD_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} x86_fp80 @_Z9ldUPreDece({{.*}})
+// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+// OGCG: %[[LD_DEC:.*]] = fadd x86_fp80 %[[LD_LOAD]], -1.000000e+00
+
+long double ldUPostInc(long double f) {
+ return f++;
+}
+
+// CHECK: cir.func{{.*}} @_Z10ldUPostInce({{.*}}) ->
(!cir.long_double<!cir.f80>{{.*}})
+// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init :
!cir.ptr<!cir.long_double<!cir.f80>>
+// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]]
+// CHECK: %[[LD_ONE:.*]] = cir.const #cir.fp<1.000000e+00> :
!cir.long_double<!cir.f80>
+// CHECK: %[[LD_INC:.*]] = cir.fadd %[[LD_LOAD]], %[[LD_ONE]]
+
+// LLVM: define{{.*}} x86_fp80 @_Z10ldUPostInce({{.*}})
+// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+// LLVM: %[[LD_INC:.*]] = fadd x86_fp80 %[[LD_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} x86_fp80 @_Z10ldUPostInce({{.*}})
+// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+// OGCG: %[[LD_INC:.*]] = fadd x86_fp80 %[[LD_LOAD]], 1.000000e+00
+
+long double ldUPostDec(long double f) {
+ return f--;
+}
+
+// CHECK: cir.func{{.*}} @_Z10ldUPostDece({{.*}}) ->
(!cir.long_double<!cir.f80>{{.*}})
+// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init :
!cir.ptr<!cir.long_double<!cir.f80>>
+// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]]
+// CHECK: %[[LD_ONE:.*]] = cir.const #cir.fp<1.000000e+00> :
!cir.long_double<!cir.f80>
+// CHECK: %[[LD_DEC:.*]] = cir.fsub %[[LD_LOAD]], %[[LD_ONE]]
+
+// LLVM: define{{.*}} x86_fp80 @_Z10ldUPostDece({{.*}})
+// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+// LLVM: %[[LD_DEC:.*]] = fsub x86_fp80 %[[LD_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} x86_fp80 @_Z10ldUPostDece({{.*}})
+// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16
+// OGCG: %[[LD_DEC:.*]] = fadd x86_fp80 %[[LD_LOAD]], -1.000000e+00
+
+// __float128 unary operations
+__float128 f128UPlus(__float128 f) {
return +f;
}
-// CHECK: cir.func{{.*}} @_Z9fp16UPlusDF16_({{.*}}) -> (!cir.f16{{.*}})
+// CHECK: cir.func{{.*}} @_Z9f128UPlusg({{.*}}) -> (!cir.f128{{.*}})
+// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128>
+// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]]
+
+// LLVM: define{{.*}} fp128 @_Z9f128UPlusg({{.*}})
+// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+
+// OGCG: define{{.*}} fp128 @_Z9f128UPlusg({{.*}})
+// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+
+__float128 f128UMinus(__float128 f) {
+ return -f;
+}
+
+// CHECK: cir.func{{.*}} @_Z10f128UMinusg({{.*}}) -> (!cir.f128{{.*}})
+// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128>
+// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]]
+// CHECK: %[[F128_NEG:.*]] = cir.fneg %[[F128_LOAD]]
+
+// LLVM: define{{.*}} fp128 @_Z10f128UMinusg({{.*}})
+// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+// LLVM: %[[F128_NEG:.*]] = fneg fp128 %[[F128_LOAD]]
+
+// OGCG: define{{.*}} fp128 @_Z10f128UMinusg({{.*}})
+// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+// OGCG: %[[F128_NEG:.*]] = fneg fp128 %[[F128_LOAD]]
+
+__float128 f128UPreInc(__float128 f) {
+ return ++f;
+}
+
+// CHECK: cir.func{{.*}} @_Z11f128UPreIncg({{.*}}) -> (!cir.f128{{.*}})
+// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128>
+// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]]
+// CHECK: %[[F128_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f128
+// CHECK: %[[F128_INC:.*]] = cir.fadd %[[F128_LOAD]], %[[F128_ONE]]
+
+// LLVM: define{{.*}} fp128 @_Z11f128UPreIncg({{.*}})
+// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+// LLVM: %[[F128_INC:.*]] = fadd fp128 %[[F128_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} fp128 @_Z11f128UPreIncg({{.*}})
+// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+// OGCG: %[[F128_INC:.*]] = fadd fp128 %[[F128_LOAD]], 1.000000e+00
+
+__float128 f128UPreDec(__float128 f) {
+ return --f;
+}
+
+// CHECK: cir.func{{.*}} @_Z11f128UPreDecg({{.*}}) -> (!cir.f128{{.*}})
+// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128>
+// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]]
+// CHECK: %[[F128_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f128
+// CHECK: %[[F128_DEC:.*]] = cir.fsub %[[F128_LOAD]], %[[F128_ONE]]
+
+// LLVM: define{{.*}} fp128 @_Z11f128UPreDecg({{.*}})
+// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+// LLVM: %[[F128_DEC:.*]] = fsub fp128 %[[F128_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} fp128 @_Z11f128UPreDecg({{.*}})
+// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+// OGCG: %[[F128_DEC:.*]] = fadd fp128 %[[F128_LOAD]], -1.000000e+00
+
+__float128 f128UPostInc(__float128 f) {
+ return f++;
+}
+
+// CHECK: cir.func{{.*}} @_Z12f128UPostIncg({{.*}}) -> (!cir.f128{{.*}})
+// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128>
+// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]]
+// CHECK: %[[F128_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f128
+// CHECK: %[[F128_INC:.*]] = cir.fadd %[[F128_LOAD]], %[[F128_ONE]]
+
+// LLVM: define{{.*}} fp128 @_Z12f128UPostIncg({{.*}})
+// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+// LLVM: %[[F128_INC:.*]] = fadd fp128 %[[F128_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} fp128 @_Z12f128UPostIncg({{.*}})
+// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+// OGCG: %[[F128_INC:.*]] = fadd fp128 %[[F128_LOAD]], 1.000000e+00
+
+__float128 f128UPostDec(__float128 f) {
+ return f--;
+}
+
+// CHECK: cir.func{{.*}} @_Z12f128UPostDecg({{.*}}) -> (!cir.f128{{.*}})
+// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128>
+// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]]
+// CHECK: %[[F128_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f128
+// CHECK: %[[F128_DEC:.*]] = cir.fsub %[[F128_LOAD]], %[[F128_ONE]]
+
+// LLVM: define{{.*}} fp128 @_Z12f128UPostDecg({{.*}})
+// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+// LLVM: %[[F128_DEC:.*]] = fsub fp128 %[[F128_LOAD]], 1.000000e+00
+
+// OGCG: define{{.*}} fp128 @_Z12f128UPostDecg({{.*}})
+// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16
+// OGCG: %[[F128_DEC:.*]] = fadd fp128 %[[F128_LOAD]], -1.000000e+00
+
+// Float16 unary operations
+_Float16 Float16UPlus(_Float16 f) {
+ return +f;
+}
+
+// CHECK: cir.func{{.*}} @_Z12Float16UPlusDF16_({{.*}}) -> (!cir.f16{{.*}})
// CHECK: %[[INPUT:.*]] = cir.load{{.*}} %[[F:.*]]
// CHECK: %[[PROMOTED:.*]] = cir.cast floating %[[INPUT]] : !cir.f16 ->
!cir.float
// CHECK: %[[UNPROMOTED:.*]] = cir.cast floating %[[PROMOTED]] : !cir.float
-> !cir.f16
-// LLVM: define{{.*}} half @_Z9fp16UPlusDF16_({{.*}})
+// LLVM: define{{.*}} half @_Z12Float16UPlusDF16_({{.*}})
// LLVM: %[[F_LOAD:.*]] = load half, ptr %{{.*}}, align 2
// LLVM: %[[PROMOTED:.*]] = fpext half %[[F_LOAD]] to float
// LLVM: %[[UNPROMOTED:.*]] = fptrunc float %[[PROMOTED]] to half
-// OGCG: define{{.*}} half @_Z9fp16UPlusDF16_({{.*}})
+// OGCG: define{{.*}} half @_Z12Float16UPlusDF16_({{.*}})
// OGCG: %[[F_LOAD:.*]] = load half, ptr %{{.*}}, align 2
// OGCG: %[[PROMOTED:.*]] = fpext half %[[F_LOAD]] to float
// OGCG: %[[UNPROMOTED:.*]] = fptrunc float %[[PROMOTED]] to half
-_Float16 fp16UMinus(_Float16 f) {
+_Float16 Float16UMinus(_Float16 f) {
return -f;
}
-// CHECK: cir.func{{.*}} @_Z10fp16UMinusDF16_({{.*}}) -> (!cir.f16{{.*}})
+// CHECK: cir.func{{.*}} @_Z13Float16UMinusDF16_({{.*}}) -> (!cir.f16{{.*}})
// CHECK: %[[INPUT:.*]] = cir.load{{.*}} %[[F:.*]]
// CHECK: %[[PROMOTED:.*]] = cir.cast floating %[[INPUT]] : !cir.f16 ->
!cir.float
// CHECK: %[[RESULT:.*]] = cir.fneg %[[PROMOTED]]
// CHECK: %[[UNPROMOTED:.*]] = cir.cast floating %[[RESULT]] : !cir.float ->
!cir.f16
-// LLVM: define{{.*}} half @_Z10fp16UMinusDF16_({{.*}})
+// LLVM: define{{.*}} half @_Z13Float16UMinusDF16_({{.*}})
// LLVM: %[[F_LOAD:.*]] = load half, ptr %{{.*}}, align 2
// LLVM: %[[PROMOTED:.*]] = fpext half %[[F_LOAD]] to float
// LLVM: %[[RESULT:.*]] = fneg float %[[PROMOTED]]
// LLVM: %[[UNPROMOTED:.*]] = fptrunc float %[[RESULT]] to half
-// OGCG: define{{.*}} half @_Z10fp16UMinusDF16_({{.*}})
+// OGCG: define{{.*}} half @_Z13Float16UMinusDF16_({{.*}})
// OGCG: %[[F_LOAD:.*]] = load half, ptr %{{.*}}, align 2
// OGCG: %[[PROMOTED:.*]] = fpext half %[[F_LOAD]] to float
// OGCG: %[[RESULT:.*]] = fneg float %[[PROMOTED]]
// OGCG: %[[UNPROMOTED:.*]] = fptrunc float %[[RESULT]] to half
+_Float16 Float16UPreInc(_Float16 f) {
+ return ++f;
+}
+
+// CHECK: cir.func{{.*}} @_Z14Float16UPreIncDF16_({{.*}}) -> (!cir.f16{{.*}})
+// CHECK: %[[PREINC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16>
+// CHECK: %[[PREINC_INPUT:.*]] = cir.load{{.*}} %[[PREINC_F]]
+// CHECK: %[[PREINC_RESULT:.*]] = cir.fadd %[[PREINC_INPUT]], %{{.*}} :
!cir.f16
+
+// LLVM: define{{.*}} half @_Z14Float16UPreIncDF16_({{.*}})
+// LLVM: %[[PREINC_F_ADDR:.*]] = alloca half, i64 1, align 2
+// LLVM: %[[PREINC_INPUT:.*]] = load half, ptr %[[PREINC_F_ADDR]], align 2
+// LLVM: %[[PREINC_RESULT:.*]] = fadd half %[[PREINC_INPUT]], 1.000000e+00
+
+// OGCG: define{{.*}} half @_Z14Float16UPreIncDF16_({{.*}})
+// OGCG: %[[PREINC_F_ADDR:.*]] = alloca half, align 2
+// OGCG: %[[PREINC_INPUT:.*]] = load half, ptr %[[PREINC_F_ADDR]], align 2
+// OGCG: %[[PREINC_RESULT:.*]] = fadd half %[[PREINC_INPUT]], 1.000000e+00
+
+_Float16 Float16UPreDec(_Float16 f) {
+ return --f;
+}
+
+// CHECK: cir.func{{.*}} @_Z14Float16UPreDecDF16_({{.*}}) -> (!cir.f16{{.*}})
+// CHECK: %[[PREDEC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16>
+// CHECK: %[[PREDEC_INPUT:.*]] = cir.load{{.*}} %[[PREDEC_F]]
+// CHECK: %[[PREDEC_RESULT:.*]] = cir.fsub %[[PREDEC_INPUT]], %{{.*}} :
!cir.f16
+
+// LLVM: define{{.*}} half @_Z14Float16UPreDecDF16_({{.*}})
+// LLVM: %[[PREDEC_F_ADDR:.*]] = alloca half, i64 1, align 2
+// LLVM: %[[PREDEC_INPUT:.*]] = load half, ptr %[[PREDEC_F_ADDR]], align 2
+// LLVM: %[[PREDEC_RESULT:.*]] = fsub half %[[PREDEC_INPUT]], 1.000000e+00
+
+// OGCG: define{{.*}} half @_Z14Float16UPreDecDF16_({{.*}})
+// OGCG: %[[PREDEC_F_ADDR:.*]] = alloca half, align 2
+// OGCG: %[[PREDEC_INPUT:.*]] = load half, ptr %[[PREDEC_F_ADDR]], align 2
+// OGCG: %[[PREDEC_RESULT:.*]] = fadd half %[[PREDEC_INPUT]], -1.000000e+00
+
+_Float16 Float16UPostInc(_Float16 f) {
+ return f++;
+}
+
+// CHECK: cir.func{{.*}} @_Z15Float16UPostIncDF16_({{.*}}) -> (!cir.f16{{.*}})
+// CHECK: %[[POSTINC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16>
+// CHECK: %[[POSTINC_INPUT:.*]] = cir.load{{.*}} %[[POSTINC_F]]
+// CHECK: %[[POSTINC_RESULT:.*]] = cir.fadd %[[POSTINC_INPUT]], %{{.*}} :
!cir.f16
+
+// LLVM: define{{.*}} half @_Z15Float16UPostIncDF16_({{.*}})
+// LLVM: %[[POSTINC_F_ADDR:.*]] = alloca half, i64 1, align 2
+// LLVM: %[[POSTINC_INPUT:.*]] = load half, ptr %[[POSTINC_F_ADDR]], align 2
+// LLVM: %[[POSTINC_RESULT:.*]] = fadd half %[[POSTINC_INPUT]], 1.000000e+00
+
+// OGCG: define{{.*}} half @_Z15Float16UPostIncDF16_({{.*}})
+// OGCG: %[[POSTINC_F_ADDR:.*]] = alloca half, align 2
+// OGCG: %[[POSTINC_INPUT:.*]] = load half, ptr %[[POSTINC_F_ADDR]], align 2
+// OGCG: %[[POSTINC_RESULT:.*]] = fadd half %[[POSTINC_INPUT]], 1.000000e+00
+
+_Float16 Float16UPostDec(_Float16 f) {
+ return f--;
+}
+
+// CHECK: cir.func{{.*}} @_Z15Float16UPostDecDF16_({{.*}}) -> (!cir.f16{{.*}})
+// CHECK: %[[POSTDEC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16>
+// CHECK: %[[POSTDEC_INPUT:.*]] = cir.load{{.*}} %[[POSTDEC_F]]
+// CHECK: %[[POSTDEC_RESULT:.*]] = cir.fsub %[[POSTDEC_INPUT]], %{{.*}} :
!cir.f16
+
+// LLVM: define{{.*}} half @_Z15Float16UPostDecDF16_({{.*}})
+// LLVM: %[[POSTDEC_F_ADDR:.*]] = alloca half, i64 1, align 2
+// LLVM: %[[POSTDEC_INPUT:.*]] = load half, ptr %[[POSTDEC_F_ADDR]], align 2
+// LLVM: %[[POSTDEC_RESULT:.*]] = fsub half %[[POSTDEC_INPUT]], 1.000000e+00
+
+// OGCG: define{{.*}} half @_Z15Float16UPostDecDF16_({{.*}})
+// OGCG: %[[POSTDEC_F_ADDR:.*]] = alloca half, align 2
+// OGCG: %[[POSTDEC_INPUT:.*]] = load half, ptr %[[POSTDEC_F_ADDR]], align 2
+// OGCG: %[[POSTDEC_RESULT:.*]] = fadd half %[[POSTDEC_INPUT]], -1.000000e+00
+
+// __fp16 unary operations
+void fp16PtrUPlus(__fp16 *f) {
+ *f = +(*f);
+}
+
+// CHECK: cir.func{{.*}} @_Z12fp16PtrUPlusPDh({{.*}})
+// CHECK: %[[FPTR_F:.*]] = cir.alloca "f" {{.*}} init :
!cir.ptr<!cir.ptr<!cir.f16>>
+// CHECK: %[[FPTR_DEREF:.*]] = cir.load deref{{.*}} %[[FPTR_F]]
+// CHECK: %[[FPTR_LOAD:.*]] = cir.load{{.*}} %[[FPTR_DEREF]]
+// CHECK: %[[FPTR_PROMOTED:.*]] = cir.cast floating %[[FPTR_LOAD]] :
!cir.f16 -> !cir.float
+// CHECK: %[[FPTR_UNPROMOTED:.*]] = cir.cast floating %[[FPTR_PROMOTED]] :
!cir.float -> !cir.f16
+
+// LLVM: define{{.*}} void @_Z12fp16PtrUPlusPDh({{.*}})
+// LLVM: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2
+// LLVM: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float
+// LLVM: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_PROMOTED]] to half
+
+// OGCG: define{{.*}} void @_Z12fp16PtrUPlusPDh({{.*}})
+// OGCG: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2
+// OGCG: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float
+// OGCG: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_PROMOTED]] to half
+
+void fp16PtrUMinus(__fp16 *f) {
----------------
Luhaocong wrote:
> When could `input` be `i16`? Could you add a test to cover such cases?
Hi @Lancern, the test cases for `__fp16` are here.
https://github.com/llvm/llvm-project/pull/193215
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