https://github.com/Luhaocong updated https://github.com/llvm/llvm-project/pull/193215
>From 3c196d0364debddf97640bf2218a07b722352e8c Mon Sep 17 00:00:00 2001 From: Haocong Lu <[email protected]> Date: Tue, 28 Apr 2026 13:09:04 +0800 Subject: [PATCH 1/3] [CIR] Upstream missing support for floating point unary operator - Add Support for `__bf16/Float16/bfloat16/float128` pre/post increment and decrement - Add test case for `__bf16/Float16/bfloat16/double/long double/float128` unary operator with target `x86_64` --- clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp | 41 +- clang/test/CIR/CodeGen/unary.cpp | 684 ++++++++++++++++++++- 2 files changed, 687 insertions(+), 38 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp index 8d660a0a2c721..e8ddad1c43285 100644 --- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp @@ -710,21 +710,23 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> { if (type->isHalfType() && !cgf.getContext().getLangOpts().NativeHalfType) { - cgf.cgm.errorNYI(e->getSourceRange(), "Unary inc/dec half"); - return {}; + // Another special case: half FP increment should be done via float. If + // the input isn't already half, it may be i16. + mlir::Value fp16Input = + builder.createBitcast(input, builder.getFp16Ty()); + value = builder.createFloatingCast(fp16Input, builder.getSingleTy()); } - if (mlir::isa<cir::SingleType, cir::DoubleType, cir::LongDoubleType>( - value.getType())) { - mlir::Location loc = cgf.getLoc(e->getExprLoc()); - auto fpType = mlir::cast<cir::FPTypeInterface>(value.getType()); - mlir::Value amount = builder.getConstFP( - loc, value.getType(), llvm::APFloat(fpType.getFloatSemantics(), 1)); - value = e->isIncrementOp() ? builder.createFAdd(loc, value, amount) - : builder.createFSub(loc, value, amount); - } else { - cgf.cgm.errorNYI(e->getSourceRange(), "Unary inc/dec other fp type"); - return {}; + // Create the inc/dec operation. + // NOTE(CIR): clang calls CreateAdd but folds this to a unary op + assert(!::cir::MissingFeatures::isPPC_FP128Ty()); + value = emitIncOrDec(e, value, /*nsw=*/false); + + if (type->isHalfType() && + !cgf.getContext().getLangOpts().NativeHalfType) { + mlir::Value fp16Output = + builder.createFloatingCast(value, builder.getFp16Ty()); + value = builder.createBitcast(fp16Output, input.getType()); } } else if (type->isFixedPointType()) { cgf.cgm.errorNYI(e->getSourceRange(), "Unary inc/dec other fixed point"); @@ -828,9 +830,16 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> { mlir::Value emitIncOrDec(const UnaryOperator *e, mlir::Value input, bool nsw = false) { mlir::Location loc = cgf.getLoc(e->getSourceRange().getBegin()); - return e->isIncrementOp() - ? builder.createOrFold<cir::IncOp>(loc, input, nsw) - : builder.createOrFold<cir::DecOp>(loc, input, nsw); + if (cir::isFPOrVectorOfFPType(input.getType())) { + auto fpType = mlir::cast<cir::FPTypeInterface>(input.getType()); + mlir::Value amount = builder.getConstFP( + loc, input.getType(), llvm::APFloat(fpType.getFloatSemantics(), 1)); + return e->isIncrementOp() ? builder.createFAdd(loc, input, amount) + : builder.createFSub(loc, input, amount); + } else { + return e->isIncrementOp() ? builder.createInc(loc, input, nsw) + : builder.createDec(loc, input, nsw); + } } mlir::Value VisitUnaryNot(const UnaryOperator *e) { diff --git a/clang/test/CIR/CodeGen/unary.cpp b/clang/test/CIR/CodeGen/unary.cpp index d2eaa0316024d..bdab89a1149b3 100644 --- a/clang/test/CIR/CodeGen/unary.cpp +++ b/clang/test/CIR/CodeGen/unary.cpp @@ -222,6 +222,24 @@ int inc2() { // OGCG: store i32 %[[A_LOAD]], ptr %[[B]], align 4 // OGCG: %[[B_TO_OUTPUT:.*]] = load i32, ptr %[[B]], align 4 +void chars(char c) { +// CHECK: cir.func{{.*}} @_Z5charsc + + int c1 = +c; + // CHECK: %[[PROMO:.*]] = cir.cast integral %{{.+}} : !s8i -> !s32i + int c2 = -c; + // CHECK: %[[PROMO:.*]] = cir.cast integral %{{.+}} : !s8i -> !s32i + // CHECK: cir.minus nsw %[[PROMO]] : !s32i + + // Chars can go through some integer promotion codegen paths even when not promoted. + // These should not have nsw attributes because the intermediate promotion makes the + // overflow defined behavior. + ++c; // CHECK: cir.inc %{{.+}} : !s8i + --c; // CHECK: cir.dec %{{.+}} : !s8i + c++; // CHECK: cir.inc %{{.+}} : !s8i + c--; // CHECK: cir.dec %{{.+}} : !s8i +} + float fpPlus() { float a = 1.0f; return +a; @@ -409,65 +427,687 @@ float fpPostInc2() { // OGCG: store float %[[A_LOAD]], ptr %[[B]], align 4 // OGCG: %[[B_TO_OUTPUT:.*]] = load float, ptr %[[B]], align 4 -void chars(char c) { -// CHECK: cir.func{{.*}} @_Z5charsc +// double unary operations +double doubleUPlus(double f) { + return +f; +} - int c1 = +c; - // CHECK: %[[PROMO:.*]] = cir.cast integral %{{.+}} : !s8i -> !s32i - int c2 = -c; - // CHECK: %[[PROMO:.*]] = cir.cast integral %{{.+}} : !s8i -> !s32i - // CHECK: cir.minus nsw %[[PROMO]] : !s32i +// CHECK: cir.func{{.*}} @_Z11doubleUPlusd({{.*}}) -> (!cir.double{{.*}}) +// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double> +// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]] - // Chars can go through some integer promotion codegen paths even when not promoted. - // These should not have nsw attributes because the intermediate promotion makes the - // overflow defined behavior. - ++c; // CHECK: cir.inc %{{.+}} : !s8i - --c; // CHECK: cir.dec %{{.+}} : !s8i - c++; // CHECK: cir.inc %{{.+}} : !s8i - c--; // CHECK: cir.dec %{{.+}} : !s8i +// LLVM: define{{.*}} double @_Z11doubleUPlusd({{.*}}) +// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 + +// OGCG: define{{.*}} double @_Z11doubleUPlusd({{.*}}) +// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 + +double doubleUMinus(double f) { + return -f; +} + +// CHECK: cir.func{{.*}} @_Z12doubleUMinusd({{.*}}) -> (!cir.double{{.*}}) +// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double> +// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]] +// CHECK: %[[DBL_NEGATED:.*]] = cir.fneg %[[DBL_LOAD]] + +// LLVM: define{{.*}} double @_Z12doubleUMinusd({{.*}}) +// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 +// LLVM: %[[DBL_NEGATED:.*]] = fneg double %[[DBL_LOAD]] + +// OGCG: define{{.*}} double @_Z12doubleUMinusd({{.*}}) +// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 +// OGCG: %[[DBL_NEGATED:.*]] = fneg double %[[DBL_LOAD]] + +double doubleUPreInc(double f) { + return ++f; +} + +// CHECK: cir.func{{.*}} @_Z13doubleUPreIncd({{.*}}) -> (!cir.double{{.*}}) +// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double> +// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]] +// CHECK: %[[DBL_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.double +// CHECK: %[[DBL_INC:.*]] = cir.fadd %[[DBL_LOAD]], %[[DBL_ONE]] + +// LLVM: define{{.*}} double @_Z13doubleUPreIncd({{.*}}) +// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 +// LLVM: %[[DBL_INC:.*]] = fadd double %[[DBL_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} double @_Z13doubleUPreIncd({{.*}}) +// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 +// OGCG: %[[DBL_INC:.*]] = fadd double %[[DBL_LOAD]], 1.000000e+00 + +double doubleUPreDec(double f) { + return --f; } -_Float16 fp16UPlus(_Float16 f) { +// CHECK: cir.func{{.*}} @_Z13doubleUPreDecd({{.*}}) -> (!cir.double{{.*}}) +// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double> +// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]] +// CHECK: %[[DBL_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.double +// CHECK: %[[DBL_DEC:.*]] = cir.fsub %[[DBL_LOAD]], %[[DBL_ONE]] + +// LLVM: define{{.*}} double @_Z13doubleUPreDecd({{.*}}) +// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 +// LLVM: %[[DBL_DEC:.*]] = fsub double %[[DBL_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} double @_Z13doubleUPreDecd({{.*}}) +// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 +// OGCG: %[[DBL_DEC:.*]] = fadd double %[[DBL_LOAD]], -1.000000e+00 + +double doubleUPostInc(double f) { + return f++; +} + +// CHECK: cir.func{{.*}} @_Z14doubleUPostIncd({{.*}}) -> (!cir.double{{.*}}) +// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double> +// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]] +// CHECK: %[[DBL_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.double +// CHECK: %[[DBL_INC:.*]] = cir.fadd %[[DBL_LOAD]], %[[DBL_ONE]] + +// LLVM: define{{.*}} double @_Z14doubleUPostIncd({{.*}}) +// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 +// LLVM: %[[DBL_INC:.*]] = fadd double %[[DBL_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} double @_Z14doubleUPostIncd({{.*}}) +// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 +// OGCG: %[[DBL_INC:.*]] = fadd double %[[DBL_LOAD]], 1.000000e+00 + +double doubleUPostDec(double f) { + return f--; +} + +// CHECK: cir.func{{.*}} @_Z14doubleUPostDecd({{.*}}) -> (!cir.double{{.*}}) +// CHECK: %[[DBL_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.double> +// CHECK: %[[DBL_LOAD:.*]] = cir.load{{.*}} %[[DBL_F]] +// CHECK: %[[DBL_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.double +// CHECK: %[[DBL_DEC:.*]] = cir.fsub %[[DBL_LOAD]], %[[DBL_ONE]] + +// LLVM: define{{.*}} double @_Z14doubleUPostDecd({{.*}}) +// LLVM: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 +// LLVM: %[[DBL_DEC:.*]] = fsub double %[[DBL_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} double @_Z14doubleUPostDecd({{.*}}) +// OGCG: %[[DBL_LOAD:.*]] = load double, ptr %{{.*}}, align 8 +// OGCG: %[[DBL_DEC:.*]] = fadd double %[[DBL_LOAD]], -1.000000e+00 + +// long double unary operations +long double ldUPlus(long double f) { + return +f; +} + +// CHECK: cir.func{{.*}} @_Z7ldUPluse({{.*}}) -> (!cir.long_double<!cir.f80>{{.*}}) +// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.long_double<!cir.f80>> +// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]] + +// LLVM: define{{.*}} x86_fp80 @_Z7ldUPluse({{.*}}) +// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 + +// OGCG: define{{.*}} x86_fp80 @_Z7ldUPluse({{.*}}) +// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 + +long double ldUMinus(long double f) { + return -f; +} + +// CHECK: cir.func{{.*}} @_Z8ldUMinuse({{.*}}) -> (!cir.long_double<!cir.f80>{{.*}}) +// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.long_double<!cir.f80>> +// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]] +// CHECK: %[[LD_NEGATED:.*]] = cir.fneg %[[LD_LOAD]] + +// LLVM: define{{.*}} x86_fp80 @_Z8ldUMinuse({{.*}}) +// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 +// LLVM: %[[LD_NEGATED:.*]] = fneg x86_fp80 %[[LD_LOAD]] + +// OGCG: define{{.*}} x86_fp80 @_Z8ldUMinuse({{.*}}) +// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 +// OGCG: %[[LD_NEGATED:.*]] = fneg x86_fp80 %[[LD_LOAD]] + +long double ldUPreInc(long double f) { + return ++f; +} + +// CHECK: cir.func{{.*}} @_Z9ldUPreInce({{.*}}) -> (!cir.long_double<!cir.f80>{{.*}}) +// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.long_double<!cir.f80>> +// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]] +// CHECK: %[[LD_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.long_double<!cir.f80> +// CHECK: %[[LD_INC:.*]] = cir.fadd %[[LD_LOAD]], %[[LD_ONE]] + +// LLVM: define{{.*}} x86_fp80 @_Z9ldUPreInce({{.*}}) +// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 +// LLVM: %[[LD_INC:.*]] = fadd x86_fp80 %[[LD_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} x86_fp80 @_Z9ldUPreInce({{.*}}) +// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 +// OGCG: %[[LD_INC:.*]] = fadd x86_fp80 %[[LD_LOAD]], 1.000000e+00 + +long double ldUPreDec(long double f) { + return --f; +} + +// CHECK: cir.func{{.*}} @_Z9ldUPreDece({{.*}}) -> (!cir.long_double<!cir.f80>{{.*}}) +// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.long_double<!cir.f80>> +// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]] +// CHECK: %[[LD_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.long_double<!cir.f80> +// CHECK: %[[LD_DEC:.*]] = cir.fsub %[[LD_LOAD]], %[[LD_ONE]] + +// LLVM: define{{.*}} x86_fp80 @_Z9ldUPreDece({{.*}}) +// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 +// LLVM: %[[LD_DEC:.*]] = fsub x86_fp80 %[[LD_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} x86_fp80 @_Z9ldUPreDece({{.*}}) +// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 +// OGCG: %[[LD_DEC:.*]] = fadd x86_fp80 %[[LD_LOAD]], -1.000000e+00 + +long double ldUPostInc(long double f) { + return f++; +} + +// CHECK: cir.func{{.*}} @_Z10ldUPostInce({{.*}}) -> (!cir.long_double<!cir.f80>{{.*}}) +// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.long_double<!cir.f80>> +// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]] +// CHECK: %[[LD_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.long_double<!cir.f80> +// CHECK: %[[LD_INC:.*]] = cir.fadd %[[LD_LOAD]], %[[LD_ONE]] + +// LLVM: define{{.*}} x86_fp80 @_Z10ldUPostInce({{.*}}) +// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 +// LLVM: %[[LD_INC:.*]] = fadd x86_fp80 %[[LD_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} x86_fp80 @_Z10ldUPostInce({{.*}}) +// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 +// OGCG: %[[LD_INC:.*]] = fadd x86_fp80 %[[LD_LOAD]], 1.000000e+00 + +long double ldUPostDec(long double f) { + return f--; +} + +// CHECK: cir.func{{.*}} @_Z10ldUPostDece({{.*}}) -> (!cir.long_double<!cir.f80>{{.*}}) +// CHECK: %[[LD_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.long_double<!cir.f80>> +// CHECK: %[[LD_LOAD:.*]] = cir.load{{.*}} %[[LD_F]] +// CHECK: %[[LD_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.long_double<!cir.f80> +// CHECK: %[[LD_DEC:.*]] = cir.fsub %[[LD_LOAD]], %[[LD_ONE]] + +// LLVM: define{{.*}} x86_fp80 @_Z10ldUPostDece({{.*}}) +// LLVM: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 +// LLVM: %[[LD_DEC:.*]] = fsub x86_fp80 %[[LD_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} x86_fp80 @_Z10ldUPostDece({{.*}}) +// OGCG: %[[LD_LOAD:.*]] = load x86_fp80, ptr %{{.*}}, align 16 +// OGCG: %[[LD_DEC:.*]] = fadd x86_fp80 %[[LD_LOAD]], -1.000000e+00 + +// __float128 unary operations +__float128 f128UPlus(__float128 f) { return +f; } -// CHECK: cir.func{{.*}} @_Z9fp16UPlusDF16_({{.*}}) -> (!cir.f16{{.*}}) +// CHECK: cir.func{{.*}} @_Z9f128UPlusg({{.*}}) -> (!cir.f128{{.*}}) +// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128> +// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]] + +// LLVM: define{{.*}} fp128 @_Z9f128UPlusg({{.*}}) +// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 + +// OGCG: define{{.*}} fp128 @_Z9f128UPlusg({{.*}}) +// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 + +__float128 f128UMinus(__float128 f) { + return -f; +} + +// CHECK: cir.func{{.*}} @_Z10f128UMinusg({{.*}}) -> (!cir.f128{{.*}}) +// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128> +// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]] +// CHECK: %[[F128_NEG:.*]] = cir.fneg %[[F128_LOAD]] + +// LLVM: define{{.*}} fp128 @_Z10f128UMinusg({{.*}}) +// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 +// LLVM: %[[F128_NEG:.*]] = fneg fp128 %[[F128_LOAD]] + +// OGCG: define{{.*}} fp128 @_Z10f128UMinusg({{.*}}) +// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 +// OGCG: %[[F128_NEG:.*]] = fneg fp128 %[[F128_LOAD]] + +__float128 f128UPreInc(__float128 f) { + return ++f; +} + +// CHECK: cir.func{{.*}} @_Z11f128UPreIncg({{.*}}) -> (!cir.f128{{.*}}) +// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128> +// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]] +// CHECK: %[[F128_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f128 +// CHECK: %[[F128_INC:.*]] = cir.fadd %[[F128_LOAD]], %[[F128_ONE]] + +// LLVM: define{{.*}} fp128 @_Z11f128UPreIncg({{.*}}) +// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 +// LLVM: %[[F128_INC:.*]] = fadd fp128 %[[F128_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} fp128 @_Z11f128UPreIncg({{.*}}) +// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 +// OGCG: %[[F128_INC:.*]] = fadd fp128 %[[F128_LOAD]], 1.000000e+00 + +__float128 f128UPreDec(__float128 f) { + return --f; +} + +// CHECK: cir.func{{.*}} @_Z11f128UPreDecg({{.*}}) -> (!cir.f128{{.*}}) +// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128> +// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]] +// CHECK: %[[F128_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f128 +// CHECK: %[[F128_DEC:.*]] = cir.fsub %[[F128_LOAD]], %[[F128_ONE]] + +// LLVM: define{{.*}} fp128 @_Z11f128UPreDecg({{.*}}) +// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 +// LLVM: %[[F128_DEC:.*]] = fsub fp128 %[[F128_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} fp128 @_Z11f128UPreDecg({{.*}}) +// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 +// OGCG: %[[F128_DEC:.*]] = fadd fp128 %[[F128_LOAD]], -1.000000e+00 + +__float128 f128UPostInc(__float128 f) { + return f++; +} + +// CHECK: cir.func{{.*}} @_Z12f128UPostIncg({{.*}}) -> (!cir.f128{{.*}}) +// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128> +// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]] +// CHECK: %[[F128_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f128 +// CHECK: %[[F128_INC:.*]] = cir.fadd %[[F128_LOAD]], %[[F128_ONE]] + +// LLVM: define{{.*}} fp128 @_Z12f128UPostIncg({{.*}}) +// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 +// LLVM: %[[F128_INC:.*]] = fadd fp128 %[[F128_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} fp128 @_Z12f128UPostIncg({{.*}}) +// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 +// OGCG: %[[F128_INC:.*]] = fadd fp128 %[[F128_LOAD]], 1.000000e+00 + +__float128 f128UPostDec(__float128 f) { + return f--; +} + +// CHECK: cir.func{{.*}} @_Z12f128UPostDecg({{.*}}) -> (!cir.f128{{.*}}) +// CHECK: %[[F128_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f128> +// CHECK: %[[F128_LOAD:.*]] = cir.load{{.*}} %[[F128_F]] +// CHECK: %[[F128_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f128 +// CHECK: %[[F128_DEC:.*]] = cir.fsub %[[F128_LOAD]], %[[F128_ONE]] + +// LLVM: define{{.*}} fp128 @_Z12f128UPostDecg({{.*}}) +// LLVM: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 +// LLVM: %[[F128_DEC:.*]] = fsub fp128 %[[F128_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} fp128 @_Z12f128UPostDecg({{.*}}) +// OGCG: %[[F128_LOAD:.*]] = load fp128, ptr %{{.*}}, align 16 +// OGCG: %[[F128_DEC:.*]] = fadd fp128 %[[F128_LOAD]], -1.000000e+00 + +// Float16 unary operations +_Float16 Float16UPlus(_Float16 f) { + return +f; +} + +// CHECK: cir.func{{.*}} @_Z12Float16UPlusDF16_({{.*}}) -> (!cir.f16{{.*}}) // CHECK: %[[INPUT:.*]] = cir.load{{.*}} %[[F:.*]] // CHECK: %[[PROMOTED:.*]] = cir.cast floating %[[INPUT]] : !cir.f16 -> !cir.float // CHECK: %[[UNPROMOTED:.*]] = cir.cast floating %[[PROMOTED]] : !cir.float -> !cir.f16 -// LLVM: define{{.*}} half @_Z9fp16UPlusDF16_({{.*}}) +// LLVM: define{{.*}} half @_Z12Float16UPlusDF16_({{.*}}) // LLVM: %[[F_LOAD:.*]] = load half, ptr %{{.*}}, align 2 // LLVM: %[[PROMOTED:.*]] = fpext half %[[F_LOAD]] to float // LLVM: %[[UNPROMOTED:.*]] = fptrunc float %[[PROMOTED]] to half -// OGCG: define{{.*}} half @_Z9fp16UPlusDF16_({{.*}}) +// OGCG: define{{.*}} half @_Z12Float16UPlusDF16_({{.*}}) // OGCG: %[[F_LOAD:.*]] = load half, ptr %{{.*}}, align 2 // OGCG: %[[PROMOTED:.*]] = fpext half %[[F_LOAD]] to float // OGCG: %[[UNPROMOTED:.*]] = fptrunc float %[[PROMOTED]] to half -_Float16 fp16UMinus(_Float16 f) { +_Float16 Float16UMinus(_Float16 f) { return -f; } -// CHECK: cir.func{{.*}} @_Z10fp16UMinusDF16_({{.*}}) -> (!cir.f16{{.*}}) +// CHECK: cir.func{{.*}} @_Z13Float16UMinusDF16_({{.*}}) -> (!cir.f16{{.*}}) // CHECK: %[[INPUT:.*]] = cir.load{{.*}} %[[F:.*]] // CHECK: %[[PROMOTED:.*]] = cir.cast floating %[[INPUT]] : !cir.f16 -> !cir.float // CHECK: %[[RESULT:.*]] = cir.fneg %[[PROMOTED]] // CHECK: %[[UNPROMOTED:.*]] = cir.cast floating %[[RESULT]] : !cir.float -> !cir.f16 -// LLVM: define{{.*}} half @_Z10fp16UMinusDF16_({{.*}}) +// LLVM: define{{.*}} half @_Z13Float16UMinusDF16_({{.*}}) // LLVM: %[[F_LOAD:.*]] = load half, ptr %{{.*}}, align 2 // LLVM: %[[PROMOTED:.*]] = fpext half %[[F_LOAD]] to float // LLVM: %[[RESULT:.*]] = fneg float %[[PROMOTED]] // LLVM: %[[UNPROMOTED:.*]] = fptrunc float %[[RESULT]] to half -// OGCG: define{{.*}} half @_Z10fp16UMinusDF16_({{.*}}) +// OGCG: define{{.*}} half @_Z13Float16UMinusDF16_({{.*}}) // OGCG: %[[F_LOAD:.*]] = load half, ptr %{{.*}}, align 2 // OGCG: %[[PROMOTED:.*]] = fpext half %[[F_LOAD]] to float // OGCG: %[[RESULT:.*]] = fneg float %[[PROMOTED]] // OGCG: %[[UNPROMOTED:.*]] = fptrunc float %[[RESULT]] to half +_Float16 Float16UPreInc(_Float16 f) { + return ++f; +} + +// CHECK: cir.func{{.*}} @_Z14Float16UPreIncDF16_({{.*}}) -> (!cir.f16{{.*}}) +// CHECK: %[[PREINC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16> +// CHECK: %[[PREINC_INPUT:.*]] = cir.load{{.*}} %[[PREINC_F]] +// CHECK: %[[PREINC_RESULT:.*]] = cir.fadd %[[PREINC_INPUT]], %{{.*}} : !cir.f16 + +// LLVM: define{{.*}} half @_Z14Float16UPreIncDF16_({{.*}}) +// LLVM: %[[PREINC_F_ADDR:.*]] = alloca half, i64 1, align 2 +// LLVM: %[[PREINC_INPUT:.*]] = load half, ptr %[[PREINC_F_ADDR]], align 2 +// LLVM: %[[PREINC_RESULT:.*]] = fadd half %[[PREINC_INPUT]], 1.000000e+00 + +// OGCG: define{{.*}} half @_Z14Float16UPreIncDF16_({{.*}}) +// OGCG: %[[PREINC_F_ADDR:.*]] = alloca half, align 2 +// OGCG: %[[PREINC_INPUT:.*]] = load half, ptr %[[PREINC_F_ADDR]], align 2 +// OGCG: %[[PREINC_RESULT:.*]] = fadd half %[[PREINC_INPUT]], 1.000000e+00 + +_Float16 Float16UPreDec(_Float16 f) { + return --f; +} + +// CHECK: cir.func{{.*}} @_Z14Float16UPreDecDF16_({{.*}}) -> (!cir.f16{{.*}}) +// CHECK: %[[PREDEC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16> +// CHECK: %[[PREDEC_INPUT:.*]] = cir.load{{.*}} %[[PREDEC_F]] +// CHECK: %[[PREDEC_RESULT:.*]] = cir.fsub %[[PREDEC_INPUT]], %{{.*}} : !cir.f16 + +// LLVM: define{{.*}} half @_Z14Float16UPreDecDF16_({{.*}}) +// LLVM: %[[PREDEC_F_ADDR:.*]] = alloca half, i64 1, align 2 +// LLVM: %[[PREDEC_INPUT:.*]] = load half, ptr %[[PREDEC_F_ADDR]], align 2 +// LLVM: %[[PREDEC_RESULT:.*]] = fsub half %[[PREDEC_INPUT]], 1.000000e+00 + +// OGCG: define{{.*}} half @_Z14Float16UPreDecDF16_({{.*}}) +// OGCG: %[[PREDEC_F_ADDR:.*]] = alloca half, align 2 +// OGCG: %[[PREDEC_INPUT:.*]] = load half, ptr %[[PREDEC_F_ADDR]], align 2 +// OGCG: %[[PREDEC_RESULT:.*]] = fadd half %[[PREDEC_INPUT]], -1.000000e+00 + +_Float16 Float16UPostInc(_Float16 f) { + return f++; +} + +// CHECK: cir.func{{.*}} @_Z15Float16UPostIncDF16_({{.*}}) -> (!cir.f16{{.*}}) +// CHECK: %[[POSTINC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16> +// CHECK: %[[POSTINC_INPUT:.*]] = cir.load{{.*}} %[[POSTINC_F]] +// CHECK: %[[POSTINC_RESULT:.*]] = cir.fadd %[[POSTINC_INPUT]], %{{.*}} : !cir.f16 + +// LLVM: define{{.*}} half @_Z15Float16UPostIncDF16_({{.*}}) +// LLVM: %[[POSTINC_F_ADDR:.*]] = alloca half, i64 1, align 2 +// LLVM: %[[POSTINC_INPUT:.*]] = load half, ptr %[[POSTINC_F_ADDR]], align 2 +// LLVM: %[[POSTINC_RESULT:.*]] = fadd half %[[POSTINC_INPUT]], 1.000000e+00 + +// OGCG: define{{.*}} half @_Z15Float16UPostIncDF16_({{.*}}) +// OGCG: %[[POSTINC_F_ADDR:.*]] = alloca half, align 2 +// OGCG: %[[POSTINC_INPUT:.*]] = load half, ptr %[[POSTINC_F_ADDR]], align 2 +// OGCG: %[[POSTINC_RESULT:.*]] = fadd half %[[POSTINC_INPUT]], 1.000000e+00 + +_Float16 Float16UPostDec(_Float16 f) { + return f--; +} + +// CHECK: cir.func{{.*}} @_Z15Float16UPostDecDF16_({{.*}}) -> (!cir.f16{{.*}}) +// CHECK: %[[POSTDEC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16> +// CHECK: %[[POSTDEC_INPUT:.*]] = cir.load{{.*}} %[[POSTDEC_F]] +// CHECK: %[[POSTDEC_RESULT:.*]] = cir.fsub %[[POSTDEC_INPUT]], %{{.*}} : !cir.f16 + +// LLVM: define{{.*}} half @_Z15Float16UPostDecDF16_({{.*}}) +// LLVM: %[[POSTDEC_F_ADDR:.*]] = alloca half, i64 1, align 2 +// LLVM: %[[POSTDEC_INPUT:.*]] = load half, ptr %[[POSTDEC_F_ADDR]], align 2 +// LLVM: %[[POSTDEC_RESULT:.*]] = fsub half %[[POSTDEC_INPUT]], 1.000000e+00 + +// OGCG: define{{.*}} half @_Z15Float16UPostDecDF16_({{.*}}) +// OGCG: %[[POSTDEC_F_ADDR:.*]] = alloca half, align 2 +// OGCG: %[[POSTDEC_INPUT:.*]] = load half, ptr %[[POSTDEC_F_ADDR]], align 2 +// OGCG: %[[POSTDEC_RESULT:.*]] = fadd half %[[POSTDEC_INPUT]], -1.000000e+00 + +// __fp16 unary operations +void fp16PtrUPlus(__fp16 *f) { + *f = +(*f); +} + +// CHECK: cir.func{{.*}} @_Z12fp16PtrUPlusPDh({{.*}}) +// CHECK: %[[FPTR_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.ptr<!cir.f16>> +// CHECK: %[[FPTR_DEREF:.*]] = cir.load deref{{.*}} %[[FPTR_F]] +// CHECK: %[[FPTR_LOAD:.*]] = cir.load{{.*}} %[[FPTR_DEREF]] +// CHECK: %[[FPTR_PROMOTED:.*]] = cir.cast floating %[[FPTR_LOAD]] : !cir.f16 -> !cir.float +// CHECK: %[[FPTR_UNPROMOTED:.*]] = cir.cast floating %[[FPTR_PROMOTED]] : !cir.float -> !cir.f16 + +// LLVM: define{{.*}} void @_Z12fp16PtrUPlusPDh({{.*}}) +// LLVM: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// LLVM: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// LLVM: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_PROMOTED]] to half + +// OGCG: define{{.*}} void @_Z12fp16PtrUPlusPDh({{.*}}) +// OGCG: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// OGCG: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// OGCG: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_PROMOTED]] to half + +void fp16PtrUMinus(__fp16 *f) { + *f = -(*f); +} + +// CHECK: cir.func{{.*}} @_Z13fp16PtrUMinusPDh({{.*}}) +// CHECK: %[[FPTR_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.ptr<!cir.f16>> +// CHECK: %[[FPTR_DEREF:.*]] = cir.load deref{{.*}} %[[FPTR_F]] +// CHECK: %[[FPTR_LOAD:.*]] = cir.load{{.*}} %[[FPTR_DEREF]] +// CHECK: %[[FPTR_PROMOTED:.*]] = cir.cast floating %[[FPTR_LOAD]] : !cir.f16 -> !cir.float +// CHECK: %[[FPTR_NEGATED:.*]] = cir.fneg %[[FPTR_PROMOTED]] +// CHECK: %[[FPTR_UNPROMOTED:.*]] = cir.cast floating %[[FPTR_NEGATED]] : !cir.float -> !cir.f16 + +// LLVM: define{{.*}} void @_Z13fp16PtrUMinusPDh({{.*}}) +// LLVM: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// LLVM: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// LLVM: %[[FPTR_NEGATED:.*]] = fneg float %[[FPTR_PROMOTED]] +// LLVM: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_NEGATED]] to half + +// OGCG: define{{.*}} void @_Z13fp16PtrUMinusPDh({{.*}}) +// OGCG: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// OGCG: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// OGCG: %[[FPTR_NEGATED:.*]] = fneg float %[[FPTR_PROMOTED]] +// OGCG: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_NEGATED]] to half + +void fp16PtrUPreInc(__fp16 *f) { + ++(*f); +} + +// CHECK: cir.func{{.*}} @_Z14fp16PtrUPreIncPDh({{.*}}) +// CHECK: %[[FPTR_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.ptr<!cir.f16>> +// CHECK: %[[FPTR_DEREF:.*]] = cir.load deref{{.*}} %[[FPTR_F]] +// CHECK: %[[FPTR_LOAD:.*]] = cir.load{{.*}} %[[FPTR_DEREF]] +// CHECK: %[[FPTR_PROMOTED:.*]] = cir.cast floating %[[FPTR_LOAD]] : !cir.f16 -> !cir.float +// CHECK: %[[FPTR_INC:.*]] = cir.fadd %[[FPTR_PROMOTED]], %{{.*}} : !cir.float +// CHECK: %[[FPTR_UNPROMOTED:.*]] = cir.cast floating %[[FPTR_INC]] : !cir.float -> !cir.f16 + +// LLVM: define{{.*}} void @_Z14fp16PtrUPreIncPDh({{.*}}) +// LLVM: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// LLVM: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// LLVM: %[[FPTR_INC:.*]] = fadd float %[[FPTR_PROMOTED]], 1.000000e+00 +// LLVM: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_INC]] to half + +// OGCG: define{{.*}} void @_Z14fp16PtrUPreIncPDh({{.*}}) +// OGCG: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// OGCG: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// OGCG: %[[FPTR_INC:.*]] = fadd float %[[FPTR_PROMOTED]], 1.000000e+00 +// OGCG: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_INC]] to half + +void fp16PtrUPreDec(__fp16 *f) { + --(*f); +} + +// CHECK: cir.func{{.*}} @_Z14fp16PtrUPreDecPDh({{.*}}) +// CHECK: %[[FPTR_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.ptr<!cir.f16>> +// CHECK: %[[FPTR_DEREF:.*]] = cir.load deref{{.*}} %[[FPTR_F]] +// CHECK: %[[FPTR_LOAD:.*]] = cir.load{{.*}} %[[FPTR_DEREF]] +// CHECK: %[[FPTR_PROMOTED:.*]] = cir.cast floating %[[FPTR_LOAD]] : !cir.f16 -> !cir.float +// CHECK: %[[FPTR_DEC:.*]] = cir.fsub %[[FPTR_PROMOTED]], %{{.*}} : !cir.float +// CHECK: %[[FPTR_UNPROMOTED:.*]] = cir.cast floating %[[FPTR_DEC]] : !cir.float -> !cir.f16 + +// LLVM: define{{.*}} void @_Z14fp16PtrUPreDecPDh({{.*}}) +// LLVM: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// LLVM: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// LLVM: %[[FPTR_DEC:.*]] = fsub float %[[FPTR_PROMOTED]], 1.000000e+00 +// LLVM: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_DEC]] to half + +// OGCG: define{{.*}} void @_Z14fp16PtrUPreDecPDh({{.*}}) +// OGCG: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// OGCG: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// OGCG: %[[FPTR_DEC:.*]] = fadd float %[[FPTR_PROMOTED]], -1.000000e+00 +// OGCG: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_DEC]] to half + +void fp16PtrUPostInc(__fp16 *f) { + (*f)++; +} + +// CHECK: cir.func{{.*}} @_Z15fp16PtrUPostIncPDh({{.*}}) +// CHECK: %[[FPTR_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.ptr<!cir.f16>> +// CHECK: %[[FPTR_DEREF:.*]] = cir.load deref{{.*}} %[[FPTR_F]] +// CHECK: %[[FPTR_LOAD:.*]] = cir.load{{.*}} %[[FPTR_DEREF]] +// CHECK: %[[FPTR_PROMOTED:.*]] = cir.cast floating %[[FPTR_LOAD]] : !cir.f16 -> !cir.float +// CHECK: %[[FPTR_INC:.*]] = cir.fadd %[[FPTR_PROMOTED]], %{{.*}} : !cir.float +// LLVM: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// LLVM: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// LLVM: %[[FPTR_INC:.*]] = fadd float %[[FPTR_PROMOTED]], 1.000000e+00 +// LLVM: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_INC]] to half + +// OGCG: define{{.*}} void @_Z15fp16PtrUPostIncPDh({{.*}}) +// OGCG: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// OGCG: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// OGCG: %[[FPTR_INC:.*]] = fadd float %[[FPTR_PROMOTED]], 1.000000e+00 +// OGCG: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_INC]] to half + +void fp16PtrUPostDec(__fp16 *f) { + (*f)--; +} + +// CHECK: cir.func{{.*}} @_Z15fp16PtrUPostDecPDh({{.*}}) +// CHECK: %[[FPTR_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.ptr<!cir.f16>> +// CHECK: %[[FPTR_DEREF:.*]] = cir.load deref{{.*}} %[[FPTR_F]] +// CHECK: %[[FPTR_LOAD:.*]] = cir.load{{.*}} %[[FPTR_DEREF]] +// CHECK: %[[FPTR_PROMOTED:.*]] = cir.cast floating %[[FPTR_LOAD]] : !cir.f16 -> !cir.float +// CHECK: %[[FPTR_DEC:.*]] = cir.fsub %[[FPTR_PROMOTED]], %{{.*}} : !cir.float +// CHECK: %[[FPTR_UNPROMOTED:.*]] = cir.cast floating %[[FPTR_DEC]] : !cir.float -> !cir.f16 + +// LLVM: define{{.*}} void @_Z15fp16PtrUPostDecPDh({{.*}}) +// LLVM: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// LLVM: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// LLVM: %[[FPTR_DEC:.*]] = fsub float %[[FPTR_PROMOTED]], 1.000000e+00 +// LLVM: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_DEC]] to half + +// OGCG: define{{.*}} void @_Z15fp16PtrUPostDecPDh({{.*}}) +// OGCG: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 +// OGCG: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float +// OGCG: %[[FPTR_DEC:.*]] = fadd float %[[FPTR_PROMOTED]], -1.000000e+00 +// OGCG: %[[FPTR_UNPROMOTED:.*]] = fptrunc float %[[FPTR_DEC]] to half + +// __bf16 unary operations +__bf16 bf16UPlus(__bf16 f) { + return +f; +} + +// CHECK: cir.func{{.*}} @_Z9bf16UPlusDF16b({{.*}}) -> (!cir.bf16{{.*}}) +// CHECK: %[[BF16_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.bf16> +// CHECK: %[[BF16_LOAD:.*]] = cir.load{{.*}} %[[BF16_F]] +// CHECK: %[[BF16_PROMOTED:.*]] = cir.cast floating %[[BF16_LOAD]] : !cir.bf16 -> !cir.float +// CHECK: %[[BF16_UNPROMOTED:.*]] = cir.cast floating %[[BF16_PROMOTED]] : !cir.float -> !cir.bf16 + +// LLVM: define{{.*}} bfloat @_Z9bf16UPlusDF16b({{.*}}) +// LLVM: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// LLVM: %[[BF16_PROMOTED:.*]] = fpext bfloat %[[BF16_LOAD]] to float +// LLVM: %[[BF16_UNPROMOTED:.*]] = fptrunc float %[[BF16_PROMOTED]] to bfloat + +// OGCG: define{{.*}} bfloat @_Z9bf16UPlusDF16b({{.*}}) +// OGCG: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// OGCG: %[[BF16_PROMOTED:.*]] = fpext bfloat %[[BF16_LOAD]] to float +// OGCG: %[[BF16_UNPROMOTED:.*]] = fptrunc float %[[BF16_PROMOTED]] to bfloat + +__bf16 bf16UMinus(__bf16 f) { + return -f; +} + +// CHECK: cir.func{{.*}} @_Z10bf16UMinusDF16b({{.*}}) -> (!cir.bf16{{.*}}) +// CHECK: %[[BF16_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.bf16> +// CHECK: %[[BF16_LOAD:.*]] = cir.load{{.*}} %[[BF16_F]] +// CHECK: %[[BF16_PROMOTED:.*]] = cir.cast floating %[[BF16_LOAD]] : !cir.bf16 -> !cir.float +// CHECK: %[[BF16_NEGATED:.*]] = cir.fneg %[[BF16_PROMOTED]] +// CHECK: %[[BF16_UNPROMOTED:.*]] = cir.cast floating %[[BF16_NEGATED]] : !cir.float -> !cir.bf16 + +// LLVM: define{{.*}} bfloat @_Z10bf16UMinusDF16b({{.*}}) +// LLVM: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// LLVM: %[[BF16_PROMOTED:.*]] = fpext bfloat %[[BF16_LOAD]] to float +// LLVM: %[[BF16_NEGATED:.*]] = fneg float %[[BF16_PROMOTED]] +// LLVM: %[[BF16_UNPROMOTED:.*]] = fptrunc float %[[BF16_NEGATED]] to bfloat + +// OGCG: define{{.*}} bfloat @_Z10bf16UMinusDF16b({{.*}}) +// OGCG: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// OGCG: %[[BF16_PROMOTED:.*]] = fpext bfloat %[[BF16_LOAD]] to float +// OGCG: %[[BF16_NEGATED:.*]] = fneg float %[[BF16_PROMOTED]] +// OGCG: %[[BF16_UNPROMOTED:.*]] = fptrunc float %[[BF16_NEGATED]] to bfloat + +__bf16 bf16UPreInc(__bf16 f) { + return ++f; +} + +// CHECK: cir.func{{.*}} @_Z11bf16UPreIncDF16b({{.*}}) -> (!cir.bf16{{.*}}) +// CHECK: %[[BF16_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.bf16> +// CHECK: %[[BF16_LOAD:.*]] = cir.load{{.*}} %[[BF16_F]] +// CHECK: %[[BF16_INC:.*]] = cir.fadd %[[BF16_LOAD]], %{{.*}} : !cir.bf16 + +// LLVM: define{{.*}} bfloat @_Z11bf16UPreIncDF16b({{.*}}) +// LLVM: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// LLVM: %[[BF16_INC:.*]] = fadd bfloat %[[BF16_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} bfloat @_Z11bf16UPreIncDF16b({{.*}}) +// OGCG: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// OGCG: %[[BF16_INC:.*]] = fadd bfloat %[[BF16_LOAD]], 1.000000e+00 + +__bf16 bf16UPreDec(__bf16 f) { + return --f; +} + +// CHECK: cir.func{{.*}} @_Z11bf16UPreDecDF16b({{.*}}) -> (!cir.bf16{{.*}}) +// CHECK: %[[BF16_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.bf16> +// CHECK: %[[BF16_LOAD:.*]] = cir.load{{.*}} %[[BF16_F]] +// CHECK: %[[BF16_DEC:.*]] = cir.fsub %[[BF16_LOAD]], %{{.*}} : !cir.bf16 + +// LLVM: define{{.*}} bfloat @_Z11bf16UPreDecDF16b({{.*}}) +// LLVM: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// LLVM: %[[BF16_DEC:.*]] = fsub bfloat %[[BF16_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} bfloat @_Z11bf16UPreDecDF16b({{.*}}) +// OGCG: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// OGCG: %[[BF16_DEC:.*]] = fadd bfloat %[[BF16_LOAD]], -1.000000e+00 + +__bf16 bf16UPostInc(__bf16 f) { + return f++; +} + +// CHECK: cir.func{{.*}} @_Z12bf16UPostIncDF16b({{.*}}) -> (!cir.bf16{{.*}}) +// CHECK: %[[BF16_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.bf16> +// CHECK: %[[BF16_LOAD:.*]] = cir.load{{.*}} %[[BF16_F]] +// CHECK: %[[BF16_INC:.*]] = cir.fadd %[[BF16_LOAD]], %{{.*}} : !cir.bf16 + +// LLVM: define{{.*}} bfloat @_Z12bf16UPostIncDF16b({{.*}}) +// LLVM: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// LLVM: %[[BF16_INC:.*]] = fadd bfloat %[[BF16_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} bfloat @_Z12bf16UPostIncDF16b({{.*}}) +// OGCG: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// OGCG: %[[BF16_INC:.*]] = fadd bfloat %[[BF16_LOAD]], 1.000000e+00 + +__bf16 bf16UPostDec(__bf16 f) { + return f--; +} + +// CHECK: cir.func{{.*}} @_Z12bf16UPostDecDF16b({{.*}}) -> (!cir.bf16{{.*}}) +// CHECK: %[[BF16_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.bf16> +// CHECK: %[[BF16_LOAD:.*]] = cir.load{{.*}} %[[BF16_F]] +// CHECK: %[[BF16_DEC:.*]] = cir.fsub %[[BF16_LOAD]], %{{.*}} : !cir.bf16 + +// LLVM: define{{.*}} bfloat @_Z12bf16UPostDecDF16b({{.*}}) +// LLVM: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// LLVM: %[[BF16_DEC:.*]] = fsub bfloat %[[BF16_LOAD]], 1.000000e+00 + +// OGCG: define{{.*}} bfloat @_Z12bf16UPostDecDF16b({{.*}}) +// OGCG: %[[BF16_LOAD:.*]] = load bfloat, ptr %{{.*}}, align 2 +// OGCG: %[[BF16_DEC:.*]] = fadd bfloat %[[BF16_LOAD]], -1.000000e+00 + void test_logical_not() { int a = 5; a = !a; >From 024bb7fe1320a2515402c44793be5532cc82ec1c Mon Sep 17 00:00:00 2001 From: Haocong Lu <[email protected]> Date: Thu, 6 Aug 2026 17:52:00 +0800 Subject: [PATCH 2/3] [CIR] Add `emitFloatIncOrDec` in `ScalarExprEmitter` --- clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp | 37 +++++++++++----------- 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp index e8ddad1c43285..50c208aaa74f2 100644 --- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp @@ -678,7 +678,7 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> { value = emitIncDecConsiderOverflowBehavior(e, value); } else { // NOTE(CIR): clang calls CreateAdd but folds this to a unary op - value = emitIncOrDec(e, input, /*nsw=*/false); + value = emitIntIncOrDec(e, input, /*nsw=*/false); } } else if (const PointerType *ptr = type->getAs<PointerType>()) { QualType type = ptr->getPointeeType(); @@ -700,7 +700,7 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> { } } else if (type->isVectorType()) { if (type->hasIntegerRepresentation()) { - value = emitIncOrDec(e, input, /*nsw=*/false); + value = emitIntIncOrDec(e, input, /*nsw=*/false); } else { cgf.cgm.errorNYI(e->getSourceRange(), "Unary inc/dec vector of float"); return {}; @@ -720,7 +720,7 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> { // Create the inc/dec operation. // NOTE(CIR): clang calls CreateAdd but folds this to a unary op assert(!::cir::MissingFeatures::isPPC_FP128Ty()); - value = emitIncOrDec(e, value, /*nsw=*/false); + value = emitFloatIncOrDec(e, value); if (type->isHalfType() && !cgf.getContext().getLangOpts().NativeHalfType) { @@ -755,13 +755,13 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> { mlir::Value inVal) { switch (cgf.getLangOpts().getSignedOverflowBehavior()) { case LangOptions::SOB_Defined: - return emitIncOrDec(e, inVal, /*nsw=*/false); + return emitIntIncOrDec(e, inVal, /*nsw=*/false); case LangOptions::SOB_Undefined: assert(!cir::MissingFeatures::sanitizers()); - return emitIncOrDec(e, inVal, /*nsw=*/true); + return emitIntIncOrDec(e, inVal, /*nsw=*/true); case LangOptions::SOB_Trapping: if (!e->canOverflow()) - return emitIncOrDec(e, inVal, /*nsw=*/true); + return emitIntIncOrDec(e, inVal, /*nsw=*/true); cgf.cgm.errorNYI(e->getSourceRange(), "inc/def overflow SOB_Trapping"); return {}; } @@ -827,19 +827,20 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> { return builder.createOrFold<cir::MinusOp>(loc, operand, nsw); } - mlir::Value emitIncOrDec(const UnaryOperator *e, mlir::Value input, - bool nsw = false) { + mlir::Value emitIntIncOrDec(const UnaryOperator *e, mlir::Value input, + bool nsw = false) { mlir::Location loc = cgf.getLoc(e->getSourceRange().getBegin()); - if (cir::isFPOrVectorOfFPType(input.getType())) { - auto fpType = mlir::cast<cir::FPTypeInterface>(input.getType()); - mlir::Value amount = builder.getConstFP( - loc, input.getType(), llvm::APFloat(fpType.getFloatSemantics(), 1)); - return e->isIncrementOp() ? builder.createFAdd(loc, input, amount) - : builder.createFSub(loc, input, amount); - } else { - return e->isIncrementOp() ? builder.createInc(loc, input, nsw) - : builder.createDec(loc, input, nsw); - } + return e->isIncrementOp() ? builder.createInc(loc, input, nsw) + : builder.createDec(loc, input, nsw); + } + + mlir::Value emitFloatIncOrDec(const UnaryOperator *e, mlir::Value input) { + mlir::Location loc = cgf.getLoc(e->getSourceRange().getBegin()); + auto fpType = mlir::cast<cir::FPTypeInterface>(input.getType()); + mlir::Value amount = builder.getConstFP( + loc, input.getType(), llvm::APFloat(fpType.getFloatSemantics(), 1)); + return e->isIncrementOp() ? builder.createFAdd(loc, input, amount) + : builder.createFSub(loc, input, amount); } mlir::Value VisitUnaryNot(const UnaryOperator *e) { >From 8df0d6e92dd162b937ef71e5fb7a6204cfb188e4 Mon Sep 17 00:00:00 2001 From: Haocong Lu <[email protected]> Date: Fri, 7 Aug 2026 11:19:16 +0800 Subject: [PATCH 3/3] [CIR] Remove unused `bitcast` for half FP Inc/Dec, and fix some typos --- clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp | 19 ++++----------- clang/lib/CodeGen/CGExprScalar.cpp | 13 ++++------- clang/test/CIR/CodeGen/unary.cpp | 27 +++++++++++++++------- 3 files changed, 28 insertions(+), 31 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp index 50c208aaa74f2..4f88db35a35f6 100644 --- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp @@ -708,26 +708,17 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> { } else if (type->isRealFloatingType()) { CIRGenFunction::CIRGenFPOptionsRAII FPOptsRAII(cgf, e); - if (type->isHalfType() && - !cgf.getContext().getLangOpts().NativeHalfType) { - // Another special case: half FP increment should be done via float. If - // the input isn't already half, it may be i16. - mlir::Value fp16Input = - builder.createBitcast(input, builder.getFp16Ty()); - value = builder.createFloatingCast(fp16Input, builder.getSingleTy()); - } + // Another special case: half FP increment should be done via float. + if (type->isHalfType() && !cgf.getContext().getLangOpts().NativeHalfType) + value = builder.createFloatingCast(value, builder.getSingleTy()); // Create the inc/dec operation. // NOTE(CIR): clang calls CreateAdd but folds this to a unary op assert(!::cir::MissingFeatures::isPPC_FP128Ty()); value = emitFloatIncOrDec(e, value); - if (type->isHalfType() && - !cgf.getContext().getLangOpts().NativeHalfType) { - mlir::Value fp16Output = - builder.createFloatingCast(value, builder.getFp16Ty()); - value = builder.createBitcast(fp16Output, input.getType()); - } + if (type->isHalfType() && !cgf.getContext().getLangOpts().NativeHalfType) + value = builder.createFloatingCast(value, builder.getFp16Ty()); } else if (type->isFixedPointType()) { cgf.cgm.errorNYI(e->getSourceRange(), "Unary inc/dec other fixed point"); return {}; diff --git a/clang/lib/CodeGen/CGExprScalar.cpp b/clang/lib/CodeGen/CGExprScalar.cpp index b54f3b9f22f0d..b4838f6a9b34e 100644 --- a/clang/lib/CodeGen/CGExprScalar.cpp +++ b/clang/lib/CodeGen/CGExprScalar.cpp @@ -3554,12 +3554,9 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV, llvm::Value *amt; CodeGenFunction::CGFPOptionsRAII FPOptsRAII(CGF, E); - if (type->isHalfType() && !CGF.getContext().getLangOpts().NativeHalfType) { - // Another special case: half FP increment should be done via float. If - // the input isn't already half, it may be i16. - Value *bitcast = Builder.CreateBitCast(input, CGF.CGM.HalfTy); - value = Builder.CreateFPExt(bitcast, CGF.CGM.FloatTy, "incdec.conv"); - } + // Another special case: half FP increment should be done via float. + if (type->isHalfType() && !CGF.getContext().getLangOpts().NativeHalfType) + value = Builder.CreateFPExt(value, CGF.CGM.FloatTy, "incdec.conv"); if (value->getType()->isFloatTy()) amt = llvm::ConstantFP::get(VMContext, @@ -3590,10 +3587,8 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV, } value = Builder.CreateFAdd(value, amt, isInc ? "inc" : "dec"); - if (type->isHalfType() && !CGF.getContext().getLangOpts().NativeHalfType) { + if (type->isHalfType() && !CGF.getContext().getLangOpts().NativeHalfType) value = Builder.CreateFPTrunc(value, CGF.CGM.HalfTy, "incdec.conv"); - value = Builder.CreateBitCast(value, input->getType()); - } // Fixed-point types. } else if (type->isFixedPointType()) { diff --git a/clang/test/CIR/CodeGen/unary.cpp b/clang/test/CIR/CodeGen/unary.cpp index bdab89a1149b3..283ddf1f695a6 100644 --- a/clang/test/CIR/CodeGen/unary.cpp +++ b/clang/test/CIR/CodeGen/unary.cpp @@ -788,7 +788,8 @@ _Float16 Float16UPreInc(_Float16 f) { // CHECK: cir.func{{.*}} @_Z14Float16UPreIncDF16_({{.*}}) -> (!cir.f16{{.*}}) // CHECK: %[[PREINC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16> // CHECK: %[[PREINC_INPUT:.*]] = cir.load{{.*}} %[[PREINC_F]] -// CHECK: %[[PREINC_RESULT:.*]] = cir.fadd %[[PREINC_INPUT]], %{{.*}} : !cir.f16 +// CHECK: %[[PREINC_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f16 +// CHECK: %[[PREINC_RESULT:.*]] = cir.fadd %[[PREINC_INPUT]], %[[PREINC_ONE]] : !cir.f16 // LLVM: define{{.*}} half @_Z14Float16UPreIncDF16_({{.*}}) // LLVM: %[[PREINC_F_ADDR:.*]] = alloca half, i64 1, align 2 @@ -807,7 +808,8 @@ _Float16 Float16UPreDec(_Float16 f) { // CHECK: cir.func{{.*}} @_Z14Float16UPreDecDF16_({{.*}}) -> (!cir.f16{{.*}}) // CHECK: %[[PREDEC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16> // CHECK: %[[PREDEC_INPUT:.*]] = cir.load{{.*}} %[[PREDEC_F]] -// CHECK: %[[PREDEC_RESULT:.*]] = cir.fsub %[[PREDEC_INPUT]], %{{.*}} : !cir.f16 +// CHECK: %[[PREDEC_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f16 +// CHECK: %[[PREDEC_RESULT:.*]] = cir.fsub %[[PREDEC_INPUT]], %[[PREDEC_ONE]] : !cir.f16 // LLVM: define{{.*}} half @_Z14Float16UPreDecDF16_({{.*}}) // LLVM: %[[PREDEC_F_ADDR:.*]] = alloca half, i64 1, align 2 @@ -826,7 +828,8 @@ _Float16 Float16UPostInc(_Float16 f) { // CHECK: cir.func{{.*}} @_Z15Float16UPostIncDF16_({{.*}}) -> (!cir.f16{{.*}}) // CHECK: %[[POSTINC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16> // CHECK: %[[POSTINC_INPUT:.*]] = cir.load{{.*}} %[[POSTINC_F]] -// CHECK: %[[POSTINC_RESULT:.*]] = cir.fadd %[[POSTINC_INPUT]], %{{.*}} : !cir.f16 +// CHECK: %[[POSTINC_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f16 +// CHECK: %[[POSTINC_RESULT:.*]] = cir.fadd %[[POSTINC_INPUT]], %[[POSTINC_ONE]] : !cir.f16 // LLVM: define{{.*}} half @_Z15Float16UPostIncDF16_({{.*}}) // LLVM: %[[POSTINC_F_ADDR:.*]] = alloca half, i64 1, align 2 @@ -845,7 +848,8 @@ _Float16 Float16UPostDec(_Float16 f) { // CHECK: cir.func{{.*}} @_Z15Float16UPostDecDF16_({{.*}}) -> (!cir.f16{{.*}}) // CHECK: %[[POSTDEC_F:.*]] = cir.alloca "f" {{.*}} init : !cir.ptr<!cir.f16> // CHECK: %[[POSTDEC_INPUT:.*]] = cir.load{{.*}} %[[POSTDEC_F]] -// CHECK: %[[POSTDEC_RESULT:.*]] = cir.fsub %[[POSTDEC_INPUT]], %{{.*}} : !cir.f16 +// CHECK: %[[POSTDEC_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.f16 +// CHECK: %[[POSTDEC_RESULT:.*]] = cir.fsub %[[POSTDEC_INPUT]], %[[POSTDEC_ONE]] : !cir.f16 // LLVM: define{{.*}} half @_Z15Float16UPostDecDF16_({{.*}}) // LLVM: %[[POSTDEC_F_ADDR:.*]] = alloca half, i64 1, align 2 @@ -912,7 +916,8 @@ void fp16PtrUPreInc(__fp16 *f) { // CHECK: %[[FPTR_DEREF:.*]] = cir.load deref{{.*}} %[[FPTR_F]] // CHECK: %[[FPTR_LOAD:.*]] = cir.load{{.*}} %[[FPTR_DEREF]] // CHECK: %[[FPTR_PROMOTED:.*]] = cir.cast floating %[[FPTR_LOAD]] : !cir.f16 -> !cir.float -// CHECK: %[[FPTR_INC:.*]] = cir.fadd %[[FPTR_PROMOTED]], %{{.*}} : !cir.float +// CHECK: %[[FPTR_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.float +// CHECK: %[[FPTR_INC:.*]] = cir.fadd %[[FPTR_PROMOTED]], %[[FPTR_ONE]] : !cir.float // CHECK: %[[FPTR_UNPROMOTED:.*]] = cir.cast floating %[[FPTR_INC]] : !cir.float -> !cir.f16 // LLVM: define{{.*}} void @_Z14fp16PtrUPreIncPDh({{.*}}) @@ -936,7 +941,8 @@ void fp16PtrUPreDec(__fp16 *f) { // CHECK: %[[FPTR_DEREF:.*]] = cir.load deref{{.*}} %[[FPTR_F]] // CHECK: %[[FPTR_LOAD:.*]] = cir.load{{.*}} %[[FPTR_DEREF]] // CHECK: %[[FPTR_PROMOTED:.*]] = cir.cast floating %[[FPTR_LOAD]] : !cir.f16 -> !cir.float -// CHECK: %[[FPTR_DEC:.*]] = cir.fsub %[[FPTR_PROMOTED]], %{{.*}} : !cir.float +// CHECK: %[[FPTR_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.float +// CHECK: %[[FPTR_DEC:.*]] = cir.fsub %[[FPTR_PROMOTED]], %[[FPTR_ONE]] : !cir.float // CHECK: %[[FPTR_UNPROMOTED:.*]] = cir.cast floating %[[FPTR_DEC]] : !cir.float -> !cir.f16 // LLVM: define{{.*}} void @_Z14fp16PtrUPreDecPDh({{.*}}) @@ -960,7 +966,11 @@ void fp16PtrUPostInc(__fp16 *f) { // CHECK: %[[FPTR_DEREF:.*]] = cir.load deref{{.*}} %[[FPTR_F]] // CHECK: %[[FPTR_LOAD:.*]] = cir.load{{.*}} %[[FPTR_DEREF]] // CHECK: %[[FPTR_PROMOTED:.*]] = cir.cast floating %[[FPTR_LOAD]] : !cir.f16 -> !cir.float -// CHECK: %[[FPTR_INC:.*]] = cir.fadd %[[FPTR_PROMOTED]], %{{.*}} : !cir.float +// CHECK: %[[FPTR_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.float +// CHECK: %[[FPTR_INC:.*]] = cir.fadd %[[FPTR_PROMOTED]], %[[FPTR_ONE]] : !cir.float +// CHECK: %[[FPTR_UNPROMOTED:.*]] = cir.cast floating %[[FPTR_DEC]] : !cir.float -> !cir.f16 + +// LLVM: define{{.*}} void @_Z15fp16PtrUPostIncPDh({{.*}}) // LLVM: %[[FPTR_LOAD:.*]] = load half, ptr %{{.*}}, align 2 // LLVM: %[[FPTR_PROMOTED:.*]] = fpext half %[[FPTR_LOAD]] to float // LLVM: %[[FPTR_INC:.*]] = fadd float %[[FPTR_PROMOTED]], 1.000000e+00 @@ -981,7 +991,8 @@ void fp16PtrUPostDec(__fp16 *f) { // CHECK: %[[FPTR_DEREF:.*]] = cir.load deref{{.*}} %[[FPTR_F]] // CHECK: %[[FPTR_LOAD:.*]] = cir.load{{.*}} %[[FPTR_DEREF]] // CHECK: %[[FPTR_PROMOTED:.*]] = cir.cast floating %[[FPTR_LOAD]] : !cir.f16 -> !cir.float -// CHECK: %[[FPTR_DEC:.*]] = cir.fsub %[[FPTR_PROMOTED]], %{{.*}} : !cir.float +// CHECK: %[[FPTR_ONE:.*]] = cir.const #cir.fp<1.000000e+00> : !cir.float +// CHECK: %[[FPTR_DEC:.*]] = cir.fsub %[[FPTR_PROMOTED]], %[[FPTR_ONE]] : !cir.float // CHECK: %[[FPTR_UNPROMOTED:.*]] = cir.cast floating %[[FPTR_DEC]] : !cir.float -> !cir.f16 // LLVM: define{{.*}} void @_Z15fp16PtrUPostDecPDh({{.*}}) _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
