================
@@ -1921,12 +1935,19 @@ Value *SplitPtrStructs::handleMemoryInst(Instruction
*I, Value *Arg, Value *Ptr,
Aux |= AMDGPU::CPol::VOLATILE;
Args.push_back(IRB.getInt32(Aux));
+ // amdgcn_raw_ptr_buffer_load has no scope operand, unlike the atomic load,
+ // store, and RMW intrinsics used below.
----------------
krzysz00 wrote:
atomic loads should have a scope operand, no?
https://github.com/llvm/llvm-project/pull/213585
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