================
@@ -2295,7 +2299,27 @@ let Predicates = [HasStdExtP] in {
def : Pat<(XLenVecI16VT (riscv_ppairoe_h GPR:$rs1, GPR:$rs2)),
(PPAIROE_H GPR:$rs1, GPR:$rs2)>;
+ // Packed byte multiply-parts patterns.
+ def : PatMulParts<int_riscv_pmul_00, PMUL_H_B00, XLenVecI16VT, XLenVecI8VT>;
----------------
sihuan wrote:
Done in the follow-up commit — the packed intrinsics now lower to the
`PMUL_HALVES_*` nodes. Two things came with it: the byte-form node patterns are
now XLen-generic so one set covers both targets, and the missing `v2i32`
halfword patterns are filled in.
I left the scalar `mul_*` intrinsics matching in isel directly. Nothing else
produces that operation, and the two shapes that need legalizing (`i32` on
RV64, `i64` on RV32) have results that an `XLenVT` node could not express
anyway, so a node would only be a pass-through. The RV64 one does reach
`PMUL_HALVES_*`, since the scalar product is the first element of the packed
one.
https://github.com/llvm/llvm-project/pull/218875
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