================
@@ -5379,14 +5360,34 @@ static SDValue getSingleShuffleSrc(MVT VT, SDValue V1,
SDValue V2) {
return SDValue();
}
-static bool isLegalVTForZvzipOperand(MVT VT, const RISCVSubtarget &Subtarget) {
+static unsigned getLMULOctuple(MVT ContainerVT) {
+ assert(ContainerVT.isScalableVector() && "Expected scalable vector type");
+ unsigned MinSize = ContainerVT.getSizeInBits().getKnownMinValue();
+ assert(isPowerOf2_32(MinSize) && MinSize >= 8 && MinSize <= 512 &&
+ "Unexpected LMUL");
+ return MinSize / (RISCV::RVVBitsPerBlock / 8);
+}
+
+static bool
+isLegalVTForZvzipDeinterleavedOperand(MVT VT, const RISCVSubtarget &Subtarget)
{
MVT ContainerVT = VT;
if (VT.isFixedLengthVector())
ContainerVT = getContainerForFixedLengthVector(VT, Subtarget);
- // Determine LMUL of the container vector.
return RISCVTargetLowering::getLMUL(ContainerVT) != RISCVVType::LMUL_8;
}
+static bool
+isLegalVTForZvzipInterleavedOperand(MVT VT, const RISCVSubtarget &Subtarget) {
+ MVT ContainerVT = VT;
+ if (VT.isFixedLengthVector())
----------------
BoyaoWang430 wrote:
This rejects a valid VZIP in the ZVL128B `interleave_v2i32` test. It uses an m1
result container, but `lowerZvzipVZIP` actually builds an m2 result from two m1
sources. This causes unnecessary slides and a merge.
https://github.com/llvm/llvm-project/blob/429b8e199e1681b86836a49969f07c7584293be2/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zvzip-zve32x.ll#L70-L85
```suggestion
if (VT.isFixedLengthVector()) {
ContainerVT = getContainerForFixedLengthVector(
VT.getHalfNumVectorElementsVT(), Subtarget);
ContainerVT = ContainerVT.getDoubleNumVectorElementsVT();
}
```
https://github.com/llvm/llvm-project/pull/210603
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