================
@@ -928,12 +928,18 @@ static std::optional<OperandInfo> getOperandInfo(const
MachineInstr &MI,
return OperandInfo(*Log2EEW);
break;
- // Zvzip - vzip.vv interleaves two LMUL vectors into a 2*LMUL result with
- // the same SEW. Dest, passthru, and mask therefore have 2 * EMUL.
+ // Zvzip - vzip.vv interleaves two half-LMUL vectors into an LMUL result with
+ // the same SEW. The vtype LMUL describes the result, so only the two source
+ // operands have half the instruction's EMUL.
case RISCV::VZIP_VV: {
auto EMUL = getEMULEqualsEEWDivSEWTimesLMUL(*Log2EEW, MI);
- if (OpIdx == 0 || OpIdx == MI.getNumExplicitDefs() || OpIdx == 4)
- EMUL = doubleEMUL(EMUL);
+ if (OpIdx == 2 || OpIdx == 3) {
+ auto [Num, IsFractional] = EMUL;
+ if (IsFractional || Num == 1)
----------------
wangpc-pp wrote:
We may add a `halfEMUL` helper function.
https://github.com/llvm/llvm-project/pull/210603
_______________________________________________
cfe-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
