efriedma created this revision.
efriedma added reviewers: compnerd, SjoerdMeijer, fhahn.
Herald added subscribers: kristof.beyls, javed.absar, mehdi_amini.
Currently, the interaction between the triple, the CPU, and the supported
features is a mess: the driver edits the triple to indicate the supported
architecture version, and the LLVM backend uses this to figure out what
instructions are legal. This makes it difficult to understand what's
happening, and makes it impossible to LTO together two modules with different
computed architectures.
Instead of relying on triple rewriting to get the correct target features, we
should add the right target features explicitly.
Repository:
rC Clang
https://reviews.llvm.org/D45240
Files:
lib/Basic/Targets/ARM.cpp
test/CodeGen/arm-long-calls.c
test/CodeGen/arm-no-movt.c
test/CodeGen/arm-target-features.c
test/CodeGen/arm-thumb-mode-target-feature.c
Index: test/CodeGen/arm-thumb-mode-target-feature.c
===================================================================
--- test/CodeGen/arm-thumb-mode-target-feature.c
+++ test/CodeGen/arm-thumb-mode-target-feature.c
@@ -17,8 +17,8 @@
// THUMB: void @t1() [[ThumbAttr:#[0-7]]]
// THUMB: void @t2() [[NoThumbAttr:#[0-7]]]
// THUMB: void @t3() [[ThumbAttr:#[0-7]]]
-// THUMB: attributes [[ThumbAttr]] = { {{.*}} "target-features"="+thumb-mode"
-// THUMB: attributes [[NoThumbAttr]] = { {{.*}} "target-features"="-thumb-mode"
+// THUMB: attributes [[ThumbAttr]] = { {{.*}} "target-features"="+thumb-mode,+v7"
+// THUMB: attributes [[NoThumbAttr]] = { {{.*}} "target-features"="+v7,-thumb-mode"
//
// THUMB-CLANG: void @t1() [[ThumbAttr:#[0-7]]]
// THUMB-CLANG: void @t2() [[NoThumbAttr:#[0-7]]]
@@ -29,5 +29,5 @@
// ARM: void @t1() [[NoThumbAtr:#[0-7]]]
// ARM: void @t2() [[NoThumbAttr:#[0-7]]]
// ARM: void @t3() [[ThumbAttr:#[0-7]]]
-// ARM: attributes [[NoThumbAttr]] = { {{.*}} "target-features"="-thumb-mode"
-// ARM: attributes [[ThumbAttr]] = { {{.*}} "target-features"="+thumb-mode"
+// ARM: attributes [[NoThumbAttr]] = { {{.*}} "target-features"="+v7,-thumb-mode"
+// ARM: attributes [[ThumbAttr]] = { {{.*}} "target-features"="+thumb-mode,+v7"
Index: test/CodeGen/arm-target-features.c
===================================================================
--- test/CodeGen/arm-target-features.c
+++ test/CodeGen/arm-target-features.c
@@ -1,22 +1,22 @@
// REQUIRES: arm-registered-target
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a8 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3
-// CHECK-VFP3: "target-features"="+dsp,+neon,+thumb-mode
+// CHECK-VFP3: "target-features"="+dsp,+neon,+thumb-mode,+v7,+vfp3"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4
-// CHECK-VFP4: "target-features"="+dsp,+neon,+thumb-mode,+vfp4"
+// CHECK-VFP4: "target-features"="+dsp,+neon,+thumb-mode,+v7,+vfp4"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-a12 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
// RUN: %clang_cc1 -triple thumbv7s-linux-gnueabi -target-cpu swift -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu krait -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
-// CHECK-VFP4-DIV: "target-features"="+dsp,+hwdiv,+hwdiv-arm,+neon,+thumb-mode,+vfp4"
+// CHECK-VFP4-DIV: "target-features"="+dsp,+hwdiv,+hwdiv-arm,+neon,+thumb-mode,+v7,+vfp4"
// RUN: %clang_cc1 -triple armv7-linux-gnueabihf -target-cpu cortex-a15 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV-ARM
// RUN: %clang_cc1 -triple armv7-linux-gnueabihf -target-cpu cortex-a17 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV-ARM
-// CHECK-VFP4-DIV-ARM: "target-features"="+dsp,+hwdiv,+hwdiv-arm,+neon,+vfp4,-thumb-mode"
+// CHECK-VFP4-DIV-ARM: "target-features"="+dsp,+hwdiv,+hwdiv-arm,+neon,+v7,+vfp4,-thumb-mode"
// RUN: %clang_cc1 -triple thumbv7s-apple-ios7.0 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a32 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
@@ -27,37 +27,37 @@
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m1 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m2 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m3 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
-// CHECK-BASIC-V8: "target-features"="+crc,+crypto,+dsp,+fp-armv8,+hwdiv,+hwdiv-arm,+neon,+thumb-mode"
+// CHECK-BASIC-V8: "target-features"="+crc,+crypto,+dsp,+fp-armv8,+hwdiv,+hwdiv-arm,+neon,+thumb-mode,+v8"
// RUN: %clang_cc1 -triple armv8-linux-gnueabi -target-cpu cortex-a53 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8-ARM
-// CHECK-BASIC-V8-ARM: "target-features"="+crc,+crypto,+dsp,+fp-armv8,+hwdiv,+hwdiv-arm,+neon,-thumb-mode"
+// CHECK-BASIC-V8-ARM: "target-features"="+crc,+crypto,+dsp,+fp-armv8,+hwdiv,+hwdiv-arm,+neon,+v8,-thumb-mode"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-DIV
-// CHECK-VFP3-D16-DIV: "target-features"="+d16,+dsp,+hwdiv,+hwdiv-arm,+thumb-mode,+vfp3"
+// CHECK-VFP3-D16-DIV: "target-features"="+d16,+dsp,+hwdiv,+hwdiv-arm,+thumb-mode,+v7,+vfp3"
// RUN: %clang_cc1 -triple armv7-linux-gnueabi -target-cpu cortex-r4f -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-THUMB-DIV
-// CHECK-VFP3-D16-THUMB-DIV: "target-features"="+d16,+dsp,+hwdiv,+vfp3,-thumb-mode"
+// CHECK-VFP3-D16-THUMB-DIV: "target-features"="+d16,+dsp,+hwdiv,+v7,+vfp3,-thumb-mode"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-FP16-DIV
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r8 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-FP16-DIV
-// CHECK-VFP3-D16-FP16-DIV: "target-features"="+d16,+dsp,+fp16,+hwdiv,+hwdiv-arm,+thumb-mode,+vfp3"
+// CHECK-VFP3-D16-FP16-DIV: "target-features"="+d16,+dsp,+fp16,+hwdiv,+hwdiv-arm,+thumb-mode,+v7,+vfp3"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-D16-SP-THUMB-DIV
-// CHECK-VFP4-D16-SP-THUMB-DIV: "target-features"="+d16,+dsp,+fp-only-sp,+hwdiv,+thumb-mode,+vfp4"
+// CHECK-VFP4-D16-SP-THUMB-DIV: "target-features"="+d16,+dsp,+fp-only-sp,+hwdiv,+thumb-mode,+v7,+vfp4"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP5-D16-THUMB-DIV
-// CHECK-VFP5-D16-THUMB-DIV: "target-features"="+d16,+dsp,+fp-armv8,+hwdiv,+thumb-mode"
+// CHECK-VFP5-D16-THUMB-DIV: "target-features"="+d16,+dsp,+fp-armv8,+hwdiv,+thumb-mode,+v7"
// RUN: %clang_cc1 -triple armv7-linux-gnueabi -target-cpu cortex-r4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-THUMB-DIV
-// CHECK-THUMB-DIV: "target-features"="+dsp,+hwdiv,-thumb-mode"
+// CHECK-THUMB-DIV: "target-features"="+dsp,+hwdiv,+v7,-thumb-mode"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m3 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-THUMB-DIV-M3
-// CHECK-THUMB-DIV-M3: "target-features"="+hwdiv,+thumb-mode"
+// CHECK-THUMB-DIV-M3: "target-features"="+hwdiv,+thumb-mode,+v7"
void foo() {}
Index: test/CodeGen/arm-no-movt.c
===================================================================
--- test/CodeGen/arm-no-movt.c
+++ test/CodeGen/arm-no-movt.c
@@ -1,7 +1,7 @@
// RUN: %clang_cc1 -triple thumbv7-apple-ios5 -target-feature +no-movt -emit-llvm -o - %s | FileCheck -check-prefix=NO-MOVT %s
// RUN: %clang_cc1 -triple thumbv7-apple-ios5 -emit-llvm -o - %s | FileCheck -check-prefix=MOVT %s
-// NO-MOVT: attributes #0 = { {{.*}} "target-features"="+no-movt,+thumb-mode"
-// MOVT-NOT: attributes #0 = { {{.*}} "target-features"="+no-movt,+thumb-mode"
+// NO-MOVT: attributes #0 = { {{.*}} "target-features"="+no-movt,+thumb-mode,+v7"
+// MOVT-NOT: attributes #0 = { {{.*}} "target-features"="+no-movt,+thumb-mode,+v7"
int foo1(int a) { return a; }
Index: test/CodeGen/arm-long-calls.c
===================================================================
--- test/CodeGen/arm-long-calls.c
+++ test/CodeGen/arm-long-calls.c
@@ -1,7 +1,7 @@
// RUN: %clang_cc1 -triple thumbv7-apple-ios5 -target-feature +long-calls -emit-llvm -o - %s | FileCheck -check-prefix=LONGCALL %s
// RUN: %clang_cc1 -triple thumbv7-apple-ios5 -emit-llvm -o - %s | FileCheck -check-prefix=NOLONGCALL %s
-// LONGCALL: attributes #0 = { {{.*}} "target-features"="+long-calls,+thumb-mode"
-// NOLONGCALL-NOT: attributes #0 = { {{.*}} "target-features"="+long-calls,+thumb-mode"
+// LONGCALL: attributes #0 = { {{.*}} "target-features"="+long-calls,+thumb-mode,+v7"
+// NOLONGCALL-NOT: attributes #0 = { {{.*}} "target-features"="+long-calls,+thumb-mode,+v7"
int foo1(int a) { return a; }
Index: lib/Basic/Targets/ARM.cpp
===================================================================
--- lib/Basic/Targets/ARM.cpp
+++ lib/Basic/Targets/ARM.cpp
@@ -337,6 +337,74 @@
std::vector<StringRef> TargetFeatures;
llvm::ARM::ArchKind Arch = llvm::ARM::parseArch(getTriple().getArchName());
+ // Map the base architecture to an appropriate target feature, so we don't
+ // rely on the target triple.
+ switch (ArchKind) {
+ case llvm::ARM::ArchKind::INVALID:
+ case llvm::ARM::ArchKind::ARMV2:
+ case llvm::ARM::ArchKind::ARMV2A:
+ case llvm::ARM::ArchKind::ARMV3:
+ case llvm::ARM::ArchKind::ARMV3M:
+ case llvm::ARM::ArchKind::ARMV4:
+ // Base ARM instruction set. (LLVM doesn't support generating code for
+ // anything before v4.)
+ break;
+ case llvm::ARM::ArchKind::ARMV4T:
+ TargetFeatures.push_back("+v4t");
+ break;
+ case llvm::ARM::ArchKind::ARMV5T:
+ TargetFeatures.push_back("+v5t");
+ break;
+ case llvm::ARM::ArchKind::ARMV5TE:
+ case llvm::ARM::ArchKind::IWMMXT:
+ case llvm::ARM::ArchKind::IWMMXT2:
+ case llvm::ARM::ArchKind::XSCALE:
+ case llvm::ARM::ArchKind::ARMV5TEJ:
+ TargetFeatures.push_back("+v5te");
+ break;
+ case llvm::ARM::ArchKind::ARMV6:
+ TargetFeatures.push_back("+v6");
+ break;
+ case llvm::ARM::ArchKind::ARMV6K:
+ case llvm::ARM::ArchKind::ARMV6KZ:
+ TargetFeatures.push_back("+v6k");
+ break;
+ case llvm::ARM::ArchKind::ARMV6T2:
+ TargetFeatures.push_back("+v6t2");
+ break;
+ case llvm::ARM::ArchKind::ARMV6M:
+ TargetFeatures.push_back("+v6m");
+ break;
+ case llvm::ARM::ArchKind::ARMV7A:
+ case llvm::ARM::ArchKind::ARMV7VE:
+ case llvm::ARM::ArchKind::ARMV7R:
+ case llvm::ARM::ArchKind::ARMV7M:
+ case llvm::ARM::ArchKind::ARMV7S:
+ case llvm::ARM::ArchKind::ARMV7EM:
+ case llvm::ARM::ArchKind::ARMV7K:
+ TargetFeatures.push_back("+v7");
+ break;
+ case llvm::ARM::ArchKind::ARMV8A:
+ case llvm::ARM::ArchKind::ARMV8R:
+ TargetFeatures.push_back("+v8");
+ break;
+ case llvm::ARM::ArchKind::ARMV8_1A:
+ TargetFeatures.push_back("+v8.1a");
+ break;
+ case llvm::ARM::ArchKind::ARMV8_2A:
+ TargetFeatures.push_back("+v8.2a");
+ break;
+ case llvm::ARM::ArchKind::ARMV8_3A:
+ TargetFeatures.push_back("+v8.3a");
+ break;
+ case llvm::ARM::ArchKind::ARMV8MBaseline:
+ TargetFeatures.push_back("+v8m");
+ break;
+ case llvm::ARM::ArchKind::ARMV8MMainline:
+ TargetFeatures.push_back("+v8m.main");
+ break;
+ }
+
// get default FPU features
unsigned FPUKind = llvm::ARM::getDefaultFPU(CPU, Arch);
llvm::ARM::getFPUFeatures(FPUKind, TargetFeatures);
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