At 10:36 06.09.2002 -0800, you wrote:

>I haven't touched NMOS in ages (if ever) so I'm certainly no expert ... 
>but one might think that they all might have been designed with the same 
>(TTL) thresholds.  I suppose that would be wishful thinking.

NMOS and CMOS are somehow interchangable, but the problem is the slow rise 
and fall times of NMos. Some CMOS circuits react with flaky outputs during 
the transition. If you clock a CMOS counter with an NMOS signal, it might 
clock several times during the transition. The more noise you have on GND, 
the more clocks you get.

When I designed the "Retro Replay" for the Commodore C64 (see ar.c64.org), 
I had tons of problems like this: I had to handle up to 0.7V noise on GND, 
and transition times of up to 50ns. I first solved this by adding 
schmitt-triggers, later got rid of them by routing the critical signals 
through RS-flipflops inside the MACH210 chip.

You don't find solutions to problems like this without proper measuring 
equipment. A simple 16-channel logic analyzer for the PC will do, but it's 
always good to have the possibility to sample an analog channel over the 
same period. My personal recommendation is the Agilent mixed-signal scope 
series (especially for the good price/performance relation), but Tektronix 
may have even more sophisticated equipment. Maybe I can afford one.. one 
fine day :-)

ciao,
-- 
Jens Sch�nfeld

--
Author: Jens =?iso-8859-1?Q?Sch�nfeld?  INET: [EMAIL PROTECTED]

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