On Mon, 2010-04-19 at 14:45 +0200, Drasko DRASKOVIC wrote: > > > On Mon, Apr 19, 2010 at 2:33 PM, Bahadir Balban <baha...@l4dev.org> > wrote: > > > Let me not hinder enthusiasm here but you need to understand > your cpu > well before attempting any porting efforts. > > I hope that there is a lot of similarity with ARM architecture... > > > > I would try creating a single .S file where you can switch > register > context between threads in assembler. Then maybe 2 simple > routines that > would enable the memory management, and add virtual to > physical mappings > to the page tables. > > What I will be concerned at the moment is project build configuration, > so I could add or1k build target and have have my CPU initialized > (stack, etc...) and giving some simple UART output (I'll have to see > how it works with or1ksim). This phase would not include any OS > concepts, just bare-metal bring-up. > > BR, > Drasko >
For the port of codezero to OpenRISC we have branched development to not mess up this list with internal discussion. Please refer to http://opencores.org/project,c0or1k and the mailing list: or1k...@lists.lrz-muenchen.de (majordomo..) Bye, Stefan -- Dipl.-Ing. Stefan Wallentowitz _/ _/_/_/ _/_/_/ Institute for Integrated Systems (LIS) _/ _/ _/ Technische Universität München _/ _/ _/_/ D-80290 München _/ _/ _/ fon +49 89 289 22963 _/_/_/_/ _/_/_/ _/_/_/ stefan.wallentow...@tum.de http://www.lis.ei.tum.de
signature.asc
Description: This is a digitally signed message part
_______________________________________________ codezero-devel mailing list codezero-devel@lists.l4dev.org http://lists.l4dev.org/mailman/listinfo/codezero-devel
