Run-time computation for enhanced integrated circuits and systems is coming
at 04/08/2019 - 4:00pm

LINC 200
Mon, 04/08/2019 - 4:00pm

Visvesh Sathe
Assistant professor, University of Washington

Abstract:
For over half a century, Integrated Circuits have been designed and developed
(rather successfully) toward the goal of enhancing computing performance and
efficiency.  During this time, the relationship between circuit design and
computing has remained largely one-directional: Careful, detailed circuit
design is performed in the service of building computing systems.
Notwithstanding a post-Moore and post-Dennard reality, the impressive strides
made by digital computing thus far spurs an important question that
re-examines the traditional circuit-computing relationship: Can runtime
computing itself be used to enhance circuit and system capabilities? If so,
under which conditions and to what extent?

 

In this talk, I will present an overview of recent efforts in my group as we
examine the promising role of computing in augmenting circuit capabilities to
(1) overcome limitations inherent in circuit design; (2) enable rapid,
time-optimal control of integrated control systems; and (3) to perform
low-complexity runtime system optimization. Each of these goals is examined a
through a representative test-chip design. Applications include robust
True-Random Number Generators (TRNGs) demonstrating the lowest measured
energy-per-bit (2.58pJ/bit), All-digital PLLs (ADPLLs) for system clocking
applications with the fastest demonstrated cold-start and re-lock times (16
Refclk cycles, mean), and an autonomous all-digital minimum energy-point
(MEP) tracking system for a sub-threshold microprocessor.

Bio:

Read more:
http://eecs.oregonstate.edu/colloquium/run-time-computation-enhanced-int... 
[1]


[1] 
http://eecs.oregonstate.edu/colloquium/run-time-computation-enhanced-integrated-circuits-and-systems
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