Author: matt Date: 2008-02-24 17:47:31 -0700 (Sun, 24 Feb 2008) New Revision: 7829
Modified: usrp2/trunk/fpga/top/u2_fpga/u2_fpga.ise usrp2/trunk/fpga/top/u2_fpga/u2_fpga.ucf usrp2/trunk/fpga/top/u2_fpga/u2_fpga_top.prj Log: constraints for serdes tx lines Modified: usrp2/trunk/fpga/top/u2_fpga/u2_fpga.ise =================================================================== (Binary files differ) Modified: usrp2/trunk/fpga/top/u2_fpga/u2_fpga.ucf =================================================================== --- usrp2/trunk/fpga/top/u2_fpga/u2_fpga.ucf 2008-02-25 00:46:34 UTC (rev 7828) +++ usrp2/trunk/fpga/top/u2_fpga/u2_fpga.ucf 2008-02-25 00:47:31 UTC (rev 7829) @@ -315,10 +315,25 @@ NET "ser_rkmsb" LOC = "Y10" ; NET "ser_rx_clk" LOC = "AA11" ; NET "ser_rx_en" LOC = "AB9" ; -NET "ser_tklsb" LOC = "U10" ; -NET "ser_tkmsb" LOC = "U11" ; -NET "ser_tx_clk" LOC = "U7" ; - +NET "ser_tklsb" LOC = "U10" | IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_tkmsb" LOC = "U11" | IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_tx_clk" LOC = "U7" | IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<0>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<1>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<2>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<3>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<4>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<5>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<6>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<7>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<8>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<9>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<10>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<11>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<12>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<13>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<14>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; +NET "ser_t<15>" IOSTANDARD = LVCMOS25 | DRIVE = 12 | SLEW = FAST ; #PACE: Start of PACE Area Constraints #PACE: Start of PACE Prohibit Constraints Modified: usrp2/trunk/fpga/top/u2_fpga/u2_fpga_top.prj =================================================================== --- usrp2/trunk/fpga/top/u2_fpga/u2_fpga_top.prj 2008-02-25 00:46:34 UTC (rev 7828) +++ usrp2/trunk/fpga/top/u2_fpga/u2_fpga_top.prj 2008-02-25 00:47:31 UTC (rev 7829) @@ -26,7 +26,7 @@ verilog work "../../eth/rtl/verilog/Reg_int.v" verilog work "../../eth/rtl/verilog/RMON/RMON_ctrl.v" verilog work "../../eth/rtl/verilog/RMON/RMON_addr_gen.v" -verilog work "../../eth/rtl/verilog/MAC_tx/Ramdon_gen.v" +verilog work "../../eth/rtl/verilog/MAC_tx/Random_gen.v" verilog work "../../eth/rtl/verilog/MAC_tx/MAC_tx_ctrl.v" verilog work "../../eth/rtl/verilog/MAC_tx/MAC_tx_addr_add.v" verilog work "../../eth/rtl/verilog/MAC_tx/MAC_tx_FF.v" _______________________________________________ Commit-gnuradio mailing list [email protected] http://lists.gnu.org/mailman/listinfo/commit-gnuradio
