Script 'mail_helper' called by obssrc
Hello community,
here is the log from the commit of package CoreFreq for openSUSE:Factory
checked in at 2023-05-15 16:54:23
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/CoreFreq (Old)
and /work/SRC/openSUSE:Factory/.CoreFreq.new.1533 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "CoreFreq"
Mon May 15 16:54:23 2023 rev:26 rq:1087112 version:1.96.1
Changes:
--------
--- /work/SRC/openSUSE:Factory/CoreFreq/CoreFreq.changes 2023-05-04
17:11:04.096538408 +0200
+++ /work/SRC/openSUSE:Factory/.CoreFreq.new.1533/CoreFreq.changes
2023-05-15 16:54:38.056277022 +0200
@@ -1,0 +2,17 @@
+Sun May 14 16:04:25 UTC 2023 - Michael Pujos <pujos.mich...@gmail.com>
+
+- update to 1.96.1
+ * [Driver]
+ - Postpone Clock Source registration during startup until the Base Clock
is computed.
+ - Change class_create() according to Linux Kernel 6.4
+ - Clear interrupt flag (cli) after Halt in the Idle method
+ * [AMD]
+ - [PHOENIX] Adding Ryzen 7940H, 7840H, 7640H
+ - [VERMEER] Adding Ryzen PRO and Embedded processors
+ - Ryzen Z1 CPUID' brand fix
+ - Adding EPYC Embedded 9004 Series as Genoa
+ - Adding EPYC Embedded 7003 Series as Milan
+ - Adding EPYC Embedded 7002 Series as Rome
+ - Adding EPYC Embedded 7001 Series as Naples
+
+-------------------------------------------------------------------
Old:
----
CoreFreq-1.96.0.tar.gz
New:
----
CoreFreq-1.96.1.tar.gz
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ CoreFreq.spec ++++++
--- /var/tmp/diff_new_pack.u75q0A/_old 2023-05-15 16:54:38.552279759 +0200
+++ /var/tmp/diff_new_pack.u75q0A/_new 2023-05-15 16:54:38.556279781 +0200
@@ -17,7 +17,7 @@
Name: CoreFreq
-Version: 1.96.0
+Version: 1.96.1
Release: 0
Summary: CPU monitoring software for 64-bit processors
License: GPL-2.0-or-later
++++++ CoreFreq-1.96.0.tar.gz -> CoreFreq-1.96.1.tar.gz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/CoreFreq-1.96.0/corefreqk.c
new/CoreFreq-1.96.1/corefreqk.c
--- old/CoreFreq-1.96.0/corefreqk.c 2023-04-27 19:17:02.000000000 +0200
+++ new/CoreFreq-1.96.1/corefreqk.c 2023-05-13 16:07:20.000000000 +0200
@@ -19407,10 +19407,11 @@
__asm__ volatile
(
"sti" "\n\t"
- "hlt"
- :
+ "hlt" "\n\t"
+ "cli"
:
:
+ : "cc"
);
return index;
}
@@ -19436,10 +19437,11 @@
__asm__ volatile
(
"sti" "\n\t"
- "hlt"
- :
+ "hlt" "\n\t"
+ "cli"
:
:
+ : "cc"
);
#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 9, 0)) || (RHEL_MINOR >= 4))
return index;
@@ -22768,7 +22770,11 @@
struct device *tmpDev;
UNUSED(pArg);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 4, 0)
+ CoreFreqK.clsdev = class_create(DRV_DEVNAME);
+#else
CoreFreqK.clsdev = class_create(THIS_MODULE, DRV_DEVNAME);
+#endif
CoreFreqK.clsdev->pm = COREFREQ_PM_OPS;
CoreFreqK.clsdev->devnode = CoreFreqK_DevNode;
@@ -23251,8 +23257,6 @@
Policy_Aggregate_Turbo();
#endif /* CONFIG_CPU_FREQ */
- CoreFreqK_Register_ClockSource(pArg->localProcessor);
-
return 0;
}
@@ -23262,6 +23266,12 @@
{
UNUSED(pArg);
+ if (Register_ClockSource == COREFREQ_TOGGLE_ON)
+ {
+ Controller_Stop(1);
+ Controller_Start(1);
+ CoreFreqK_Register_ClockSource(PUBLIC(RO(Proc))->Service.Core);
+ }
if (Ratio_HWP_Count > 0)
{
CLOCK_ARG clockMod;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/CoreFreq-1.96.0/corefreqk.h
new/CoreFreq-1.96.1/corefreqk.h
--- old/CoreFreq-1.96.0/corefreqk.h 2023-04-27 19:17:02.000000000 +0200
+++ new/CoreFreq-1.96.1/corefreqk.h 2023-05-13 16:07:20.000000000 +0200
@@ -1998,9 +1998,9 @@
[Zen4/Genoa] AF_11h Stepping 1 5 nm [GNA]/SVR
[Zen4/Raphael] AF_61h Stepping 2 5 nm [RPL]
[Zen4/Dragon Range] AF_61h Stepping 2 5 nm FL1
- [Zen4/Phoenix] AF_74h 4 nm [PHX] */
+ [Zen4/Phoenix Point] AF_74h 4 nm [PHX] */
/*
- [Zen4/Storm Peak] AF_18h Stepping 1 TR5
+ [Zen4/Storm Peak] AF_18h Stepping 1 HEDT/TR5
[Zen5/Granite Ridge] */
#define _AMD_Family_19h {.ExtFamily=0xa, .Family=0xF, .ExtModel=0x0,
.Model=0x0}
#define _AMD_Zen3_VMR {.ExtFamily=0xa, .Family=0xF, .ExtModel=0x2, .Model=0x1}
@@ -3543,7 +3543,7 @@
[CN_DRAGON_RANGE] = "Zen4/Dragon Range"
);
static char *Arch_AMD_Zen4_PHX[] = ZLIST(
- [CN_PHOENIX] = "Zen4/Phoenix"
+ [CN_PHOENIX] = "Zen4/Phoenix Point"
);
static char *Arch_AMD_Family_17h[] = ZLIST("AMD Zen");
@@ -4597,7 +4597,8 @@
},
/* [EPYC/Naples] 8F_01h Stepping 2 */
{ /* AMD EPYC Server Processors */
- .Brand = ZLIST("AMD EPYC 7251"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7251", \
+ "AMD EPYC 7251" ),
.Boost = {+8, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_NAPLES,
@@ -4608,7 +4609,8 @@
.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
},
{
- .Brand = ZLIST("AMD EPYC 7261"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7261", \
+ "AMD EPYC 7261" ),
.Boost = {+4, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_NAPLES,
@@ -4619,7 +4621,8 @@
.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
},
{
- .Brand = ZLIST("AMD EPYC 7281"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7281", \
+ "AMD EPYC 7281" ),
.Boost = {+6, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_NAPLES,
@@ -4630,9 +4633,11 @@
.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
},
{
- .Brand = ZLIST( "AMD EPYC 7351P", \
- "AMD EPYC 7351", \
- "AMD EPYC 7301" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 735P", \
+ "AMD EPYC Embedded 7351", \
+ "AMD EPYC 7351P", \
+ "AMD EPYC 7351", \
+ "AMD EPYC 7301" ),
.Boost = {+5, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_NAPLES,
@@ -4643,8 +4648,23 @@
.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
},
{
- .Brand = ZLIST( "AMD EPYC 7401P", \
- "AMD EPYC 7401" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7371", \
+ "AMD EPYC Embedded 7301", \
+ "AMD EPYC 7371" ),
+ .Boost = {+7, 0},
+ .Param.Offset = {0, 0, 0},
+ .CodeNameIdx = CN_NAPLES,
+ .TgtRatioUnlocked = 1,
+ .ClkRatioUnlocked = 0b10,
+ .TurboUnlocked = 1,
+ .UncoreUnlocked = 0,
+ .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
+ },
+ {
+ .Brand = ZLIST( "AMD EPYC Embedded 740P", \
+ "AMD EPYC Embedded 7401", \
+ "AMD EPYC 7401P", \
+ "AMD EPYC 7401" ),
.Boost = {+8, +2},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_NAPLES,
@@ -4655,7 +4675,8 @@
.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
},
{
- .Brand = ZLIST("AMD EPYC 7451"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7451", \
+ "AMD EPYC 7451" ),
.Boost = {+6, +3},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_NAPLES,
@@ -4666,9 +4687,12 @@
.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
},
{
- .Brand = ZLIST( "AMD EPYC 7551P", \
- "AMD EPYC 7551", \
- "AMD EPYC 7501" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 755P", \
+ "AMD EPYC Embedded 7551", \
+ "AMD EPYC Embedded 7501", \
+ "AMD EPYC 7551P", \
+ "AMD EPYC 7551", \
+ "AMD EPYC 7501" ),
.Boost = {+6, +4},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_NAPLES,
@@ -4679,7 +4703,8 @@
.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
},
{
- .Brand = ZLIST("AMD EPYC 7601"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7601", \
+ "AMD EPYC 7601" ),
.Boost = {+5, +5},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_NAPLES,
@@ -5463,8 +5488,10 @@
static PROCESSOR_SPECIFIC AMD_EPYC_Rome_CPK_Specific[] = {
/* [EPYC/Rome] 8F_31h Stepping 0 */
{
- .Brand = ZLIST( "AMD EPYC 7232P", \
- "AMD EPYC 7252" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7232P", \
+ "AMD EPYC Embedded 7252", \
+ "AMD EPYC 7232P", \
+ "AMD EPYC 7252" ),
.Boost = {+1, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5477,8 +5504,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7262", \
- "AMD EPYC 7F32" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7262", \
+ "AMD EPYC Embedded 7F32", \
+ "AMD EPYC 7262", \
+ "AMD EPYC 7F32" ),
.Boost = {+2, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5491,7 +5520,8 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST("AMD EPYC 7272"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7272", \
+ "AMD EPYC 7272" ),
.Boost = {+3, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5504,8 +5534,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7282", \
- "AMD EPYC 7F52" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7282", \
+ "AMD EPYC Embedded 7F52", \
+ "AMD EPYC 7282", \
+ "AMD EPYC 7F52" ),
.Boost = {+4, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5518,8 +5550,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7302P", \
- "AMD EPYC 7302" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7302P", \
+ "AMD EPYC Embedded 7302", \
+ "AMD EPYC 7302P", \
+ "AMD EPYC 7302" ),
.Boost = {+3, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5532,8 +5566,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7402P", \
- "AMD EPYC 7402" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7402P", \
+ "AMD EPYC Embedded 7402", \
+ "AMD EPYC 7402P", \
+ "AMD EPYC 7402" ),
.Boost = {+6, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5546,7 +5582,8 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST("AMD EPYC 7352"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7352", \
+ "AMD EPYC 7352" ),
.Boost = {+9, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5559,9 +5596,12 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7502P", \
- "AMD EPYC 7502", \
- "AMD EPYC 7532" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7502P", \
+ "AMD EPYC Embedded 7502", \
+ "AMD EPYC Embedded 7532", \
+ "AMD EPYC 7502P", \
+ "AMD EPYC 7502", \
+ "AMD EPYC 7532" ),
.Boost = {+9, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5574,8 +5614,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7542", \
- "AMD EPYC 7F72" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7542", \
+ "AMD EPYC Embedded 7F72", \
+ "AMD EPYC 7542", \
+ "AMD EPYC 7F72" ),
.Boost = {+5, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5588,7 +5630,8 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST("AMD EPYC 7552"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7552", \
+ "AMD EPYC 7552" ),
.Boost = {+11, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5601,8 +5644,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7452", \
- "AMD EPYC 7642" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7452", \
+ "AMD EPYC Embedded 7642", \
+ "AMD EPYC 7452", \
+ "AMD EPYC 7642" ),
.Boost = {+10, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5615,7 +5660,8 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST("AMD EPYC 7662"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7662", \
+ "AMD EPYC 7662" ),
.Boost = {+13, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5628,8 +5674,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7702P", \
- "AMD EPYC 7702" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7702P", \
+ "AMD EPYC Embedded 7702", \
+ "AMD EPYC 7702P", \
+ "AMD EPYC 7702" ),
.Boost = {+14, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5642,7 +5690,8 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST("AMD EPYC 7742"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7742", \
+ "AMD EPYC 7742" ),
.Boost = {+12, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -5655,7 +5704,8 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST("AMD EPYC 7H12"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7H12", \
+ "AMD EPYC 7H12" ),
.Boost = {+7, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_ROME,
@@ -6388,6 +6438,58 @@
.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK\
|LATCH_HSMP_CAPABLE
},
+ {
+ .Brand = ZLIST("AMD Ryzen 7 PRO 5845"),
+ .Boost = {+12, 0},
+ .Param.Offset = {0, 0, 0},
+ .CodeNameIdx = CN_VERMEER,
+ .TgtRatioUnlocked = 1,
+ .ClkRatioUnlocked = 0b10,
+ .TurboUnlocked = 0,
+ .UncoreUnlocked = 0,
+ .HSMP_Capable = 1,
+ .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK\
+ |LATCH_HSMP_CAPABLE
+ },
+ {
+ .Brand = ZLIST("AMD Ryzen 5 PRO 5645"),
+ .Boost = {+9, 0},
+ .Param.Offset = {0, 0, 0},
+ .CodeNameIdx = CN_VERMEER,
+ .TgtRatioUnlocked = 1,
+ .ClkRatioUnlocked = 0b10,
+ .TurboUnlocked = 0,
+ .UncoreUnlocked = 0,
+ .HSMP_Capable = 1,
+ .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK\
+ |LATCH_HSMP_CAPABLE
+ },
+ {
+ .Brand = ZLIST( "AMD Ryzen Embedded 5600E", \
+ "AMD Ryzen Embedded 5800E" ),
+ .Boost = {+3, 0},
+ .Param.Offset = {0, 0, 0},
+ .CodeNameIdx = CN_VERMEER,
+ .TgtRatioUnlocked = 1,
+ .ClkRatioUnlocked = 0b10,
+ .TurboUnlocked = 0,
+ .UncoreUnlocked = 0,
+ .HSMP_Capable = 1,
+ .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_HSMP_CAPABLE
+ },
+ {
+ .Brand = ZLIST( "AMD Ryzen Embedded 5900E", \
+ "AMD Ryzen Embedded 5950E" ),
+ .Boost = {+4, 0},
+ .Param.Offset = {0, 0, 0},
+ .CodeNameIdx = CN_VERMEER,
+ .TgtRatioUnlocked = 1,
+ .ClkRatioUnlocked = 0b10,
+ .TurboUnlocked = 0,
+ .UncoreUnlocked = 0,
+ .HSMP_Capable = 1,
+ .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_HSMP_CAPABLE
+ },
{0}
};
static PROCESSOR_SPECIFIC AMD_Zen3_CZN_Specific[] = {
@@ -6717,8 +6819,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7713P", \
- "AMD EPYC 7713" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7713P", \
+ "AMD EPYC Embedded 7713", \
+ "AMD EPYC 7713P", \
+ "AMD EPYC 7713" ),
.Boost = {+17, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_MILAN,
@@ -6744,8 +6848,9 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7773X", \
- "AMD EPYC 7643" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7643", \
+ "AMD EPYC 7773X", \
+ "AMD EPYC 7643" ),
.Boost = {+13, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_MILAN,
@@ -6758,8 +6863,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7543P", \
- "AMD EPYC 7543" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7543P", \
+ "AMD EPYC Embedded 7543", \
+ "AMD EPYC 7543P", \
+ "AMD EPYC 7543" ),
.Boost = {+9, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_MILAN,
@@ -6785,10 +6892,12 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7453", \
- "AMD EPYC 7343", \
- "AMD EPYC 7313P", \
- "AMD EPYC 7313" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7313P", \
+ "AMD EPYC Embedded 7313", \
+ "AMD EPYC 7453", \
+ "AMD EPYC 7343", \
+ "AMD EPYC 7313P", \
+ "AMD EPYC 7313" ),
.Boost = {+7, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_MILAN,
@@ -6801,8 +6910,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 7443P", \
- "AMD EPYC 7443" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 7443P", \
+ "AMD EPYC Embedded 7443", \
+ "AMD EPYC 7443P", \
+ "AMD EPYC 7443" ),
.Boost = {+12, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_MILAN,
@@ -6815,7 +6926,8 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST("AMD EPYC 7413"),
+ .Brand = ZLIST( "AMD EPYC Embedded 7413", \
+ "AMD EPYC 7413" ),
.Boost = {+10, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_MILAN,
@@ -7148,10 +7260,13 @@
};
static PROCESSOR_SPECIFIC AMD_Zen4_Genoa_Specific[] = {
{
- .Brand = ZLIST( "AMD EPYC 9654P", \
- "AMD EPYC 9654", \
- "AMD EPYC 9534", \
- "AMD EPYC 9254" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 9654P", \
+ "AMD EPYC Embedded 9654", \
+ "AMD EPYC Embedded 9254", \
+ "AMD EPYC 9654P", \
+ "AMD EPYC 9654", \
+ "AMD EPYC 9534", \
+ "AMD EPYC 9254" ),
.Boost = {+13, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_GENOA,
@@ -7177,9 +7292,12 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 9554P", \
- "AMD EPYC 9554", \
- "AMD EPYC 9124" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 9554P", \
+ "AMD EPYC Embedded 9554", \
+ "AMD EPYC Embedded 9124", \
+ "AMD EPYC 9554P", \
+ "AMD EPYC 9554", \
+ "AMD EPYC 9124" ),
.Boost = {+7, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_GENOA,
@@ -7206,8 +7324,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 9454P", \
- "AMD EPYC 9454" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 9454P", \
+ "AMD EPYC Embedded 9454", \
+ "AMD EPYC 9454P", \
+ "AMD EPYC 9454" ),
.Boost = {+11, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_GENOA,
@@ -7220,8 +7340,10 @@
|LATCH_HSMP_CAPABLE
},
{
- .Brand = ZLIST( "AMD EPYC 9354P", \
- "AMD EPYC 9354" ),
+ .Brand = ZLIST( "AMD EPYC Embedded 9354P", \
+ "AMD EPYC Embedded 9354", \
+ "AMD EPYC 9354P", \
+ "AMD EPYC 9354" ),
.Boost = {+6, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_GENOA,
@@ -7435,7 +7557,8 @@
static PROCESSOR_SPECIFIC AMD_Zen4_PHX_Specific[] = {
{
.Brand = ZLIST( "AMD Ryzen 9 PRO 7940HS", \
- "AMD Ryzen 9 7940HS" ),
+ "AMD Ryzen 9 7940HS", \
+ "AMD Ryzen 9 7940H" /* zh-cn */ ),
.Boost = {+12, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_PHOENIX,
@@ -7448,7 +7571,8 @@
},
{
.Brand = ZLIST( "AMD Ryzen 7 PRO 7840HS", \
- "AMD Ryzen 7 7840HS" ),
+ "AMD Ryzen 7 7840HS", \
+ "AMD Ryzen 7 7840H" /* zh-cn */ ),
.Boost = {+13, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_PHOENIX,
@@ -7460,7 +7584,8 @@
.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
},
{
- .Brand = ZLIST("AMD Ryzen 5 7640HS"),
+ .Brand = ZLIST( "AMD Ryzen 5 7640HS", \
+ "AMD Ryzen 5 7640H" /* zh-cn */ ),
.Boost = {+7, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_PHOENIX,
@@ -7473,7 +7598,7 @@
},
{
.Brand = ZLIST( "AMD Ryzen 7 7840U", \
- "Ryzen Z1 Extreme" ),
+ "AMD Ryzen Z1 Extreme" ),
.Boost = {+18, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_PHOENIX,
@@ -7486,7 +7611,7 @@
},
{
.Brand = ZLIST( "AMD Ryzen 5 7540U", \
- "Ryzen Z1" ),
+ "AMD Ryzen Z1" ),
.Boost = {+17, 0},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_PHOENIX,
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/CoreFreq-1.96.0/coretypes.h
new/CoreFreq-1.96.1/coretypes.h
--- old/CoreFreq-1.96.0/coretypes.h 2023-04-27 19:17:02.000000000 +0200
+++ new/CoreFreq-1.96.1/coretypes.h 2023-05-13 16:07:20.000000000 +0200
@@ -6,7 +6,7 @@
#define COREFREQ_MAJOR 1
#define COREFREQ_MINOR 96
-#define COREFREQ_REV 0
+#define COREFREQ_REV 1
#if !defined(CORE_COUNT)
#define CORE_COUNT 256
