ssekar15 opened a new pull request, #21546:
URL: https://github.com/apache/nuttx/pull/21546
## Summary
Both chip families start from the Infineon iLLD startup software
(Ifx_Ssw_Tc0.c, Ifx_Ssw_Infra.c, with the hooks in Ifx_Cfg_Ssw.c), and
core_main synchronizes the cores with IfxCpu. This series replaces both
with native code that follows the iLLD phase order:
- arch/tricore: Synchronize the cores at startup without the iLLD.
Set the bit of the core with imask and ldmst and wait for the cores with
the timeout IfxCpu used: all cores with 1 ms on TC3xx, only CPU0 on
TC4xx. The mask and timeout are defined per chip family in
tricore_main.c.
- arch/tricore: Start up TC3xx without the iLLD.
_START in tricore_head sets the stack, the small data base registers and
the PSW; tricore_start links the CSAs, sets up the clocks after a
power-on reset, initializes the C runtime with the watchdogs disabled,
starts CPU1 unless TRICORE_BL is set, enables the caches, sets BTV, BIV
and ISP and enters core0_main.
- arch/tricore: Start up TC4xx without the iLLD.
tricore_head first disables the virtualization from a call that returns
with rfh, on a boot stack and a single boot CSA in the PSPR, and sets
BTV. tricore_start links the CSAs and, after a power-on reset, sets the
startup watchdog reload, clears the LMU and MCAN RAMs with the VMT MBIST
controllers, initializes the C runtime, powers up the crystal and sets
up the clocks; after an application reset it stops if the key-off marker
is set. Then it starts CPU1 to CPU5 unless TRICORE_BL is set, enables
the caches, sets BIV, ISP and the application watchdog reload and enters
core0_main.
The register definitions of the startup code are in src/tc3xx/hardware
(tc3xx_scu.h, tc3xx_cpu.h) and src/tc4xx/hardware (tc4xx_smm.h,
tc4xx_pms.h, tc4xx_cpu.h, tc4xx_vmt.h, plus fields in tc4xx_clock.h and
tc4xx_wdt.h).
## Dependency
Depends on https://github.com/apache/nuttx/pull/21545.
## Impact
TriCore only (arch/tricore).
- New common/gnu/tricore_head.S, common/tasking/tricore_head.asm,
tc3xx/tc3xx_start.c and tc4xx/tc4xx_start.c.
- arch/tricore/include/csfr.h gets BIV, BTV, ISP, LCX and VCON0.
- Ifx_Ssw_Tc0.c, Ifx_Ssw_Infra.c and Ifx_Cfg_Ssw.c are no longer built.
- Multicore: CPU1 (TC3xx) and CPU1 to CPU5 (TC4xx) are started at their
__STARTn entries as before; NuttX runs on CPU0 only (AMP).
- No functional change intended: the core and watchdog registers after
boot are the same as with the iLLD startup.
No Kconfig, board defconfig or documentation changes.
## Testing
I confirm that changes are verified on local setup and works as intended:
* Build Host(s): Linux x86_64, Debian GNU/Linux 12 (bookworm)
* Toolchains: AURIX GCC 11.3.1 (tricore-elf-gcc), TASKING VX-toolset v6.4r1
(TC3x), TASKING SmartCode v10.4r1 (TC4x)
* Build systems: make, cmake (Ninja)
* Target(s): a2g-tc397-5v-tft:nsh, triboard_tc4x9_com:nsh
* Hardware: TriBoard TC397 V2.0; TriBoard TC4x7 COM V3.0 for the
triboard_tc4x9_com image
* Each commit passes tools/checkpatch.sh. The TC3xx commit alone boots to
nsh on TC397 with GCC and TASKING.
Build results (tip):
| Board | GCC make | GCC cmake | TASKING make | TASKING cmake |
|---|---|---|---|---|
| a2g-tc397-5v-tft:nsh | pass | pass | pass | - |
| triboard_tc4x9_com:nsh | pass | - | pass | pass |
Runtime, ostest (on 33a640b5e22, the same code as the tip before a
cmake-format indentation fix in arch/tricore/src/CMakeLists.txt):
| Board | GCC | TASKING |
|---|---|---|
| TriBoard TC397 (a2g-tc397-5v-tft:nsh) | pass | pass |
| TriBoard TC4x7 (triboard_tc4x9_com:nsh) | pass | wqueue assert, also on
master |
```
nsh> uname -a
NuttX 10.4.0 33a640b5e22 Nov 6 2026 22:35:09 tricore a2g-tc397-5v-tft
nsh> ostest
...
user_main: Exiting
ostest_main: Exiting with status 0
```
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