This is an automated email from the ASF dual-hosted git repository. kasjer pushed a commit to branch master in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 4be5ca91e0b41a80e7cbda321d75179965d37d59 Author: Jerzy Kasenberg <[email protected]> AuthorDate: Wed May 6 13:28:53 2026 +0200 stm32h5: Add gpio helpers STM32 GPIO pin functions now have configuration that can be used. If pin can be assigned for specific function like SPI, code will provide apprpriate value like PA12_SPI2_SCK that can be used for pin configuration Signed-off-by: Jerzy Kasenberg <[email protected]> --- hw/mcu/stm/stm32h5xx/include/mcu/stm32_pin_cfg.h | 3280 ++++++++++++++++++++++ hw/mcu/stm/stm32h5xx/src/stm32_pin_cfg.c | 112 + 2 files changed, 3392 insertions(+) diff --git a/hw/mcu/stm/stm32h5xx/include/mcu/stm32_pin_cfg.h b/hw/mcu/stm/stm32h5xx/include/mcu/stm32_pin_cfg.h new file mode 100644 index 000000000..f55237499 --- /dev/null +++ b/hw/mcu/stm/stm32h5xx/include/mcu/stm32_pin_cfg.h @@ -0,0 +1,3280 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef _STM32_PIN_CFG_H +#define _STM32_PIN_CFG_H + +#include <stdint.h> +#include <mcu/stm32_hal.h> + +#ifdef __cplusplus +extern "C" { +#endif + +typedef uint16_t hal_gpio_pin_t; +typedef const struct stm32_pin_cfg *stm32_pin_cfg_t; + +struct stm32_pin_cfg { + hal_gpio_pin_t pin; + GPIO_InitTypeDef hal_init; +}; + +void stm32_pin_config(stm32_pin_cfg_t cfg); +void stm32_pin_pulse(hal_gpio_pin_t pin); +void stm32_pin_pulse_n(hal_gpio_pin_t pin, int pulse_count); + +#define NULL_PIN NULL + +/* Port definitions */ +#ifdef GPIOA +#define PA0 MCU_GPIO_PORTA(0) +#define PA1 MCU_GPIO_PORTA(1) +#define PA2 MCU_GPIO_PORTA(2) +#define PA3 MCU_GPIO_PORTA(3) +#define PA4 MCU_GPIO_PORTA(4) +#define PA5 MCU_GPIO_PORTA(5) +#define PA6 MCU_GPIO_PORTA(6) +#define PA7 MCU_GPIO_PORTA(7) +#define PA8 MCU_GPIO_PORTA(8) +#define PA9 MCU_GPIO_PORTA(9) +#define PA10 MCU_GPIO_PORTA(10) +#define PA11 MCU_GPIO_PORTA(11) +#define PA12 MCU_GPIO_PORTA(12) +#define PA13 MCU_GPIO_PORTA(13) +#define PA14 MCU_GPIO_PORTA(14) +#define PA15 MCU_GPIO_PORTA(15) +#endif + +#ifdef GPIOB +#define PB0 MCU_GPIO_PORTB(0) +#define PB1 MCU_GPIO_PORTB(1) +#define PB2 MCU_GPIO_PORTB(2) +#define PB3 MCU_GPIO_PORTB(3) +#define PB4 MCU_GPIO_PORTB(4) +#define PB5 MCU_GPIO_PORTB(5) +#define PB6 MCU_GPIO_PORTB(6) +#define PB7 MCU_GPIO_PORTB(7) +#define PB8 MCU_GPIO_PORTB(8) +#define PB9 MCU_GPIO_PORTB(9) +#define PB10 MCU_GPIO_PORTB(10) +#define PB11 MCU_GPIO_PORTB(11) +#define PB12 MCU_GPIO_PORTB(12) +#define PB13 MCU_GPIO_PORTB(13) +#define PB14 MCU_GPIO_PORTB(14) +#define PB15 MCU_GPIO_PORTB(15) +#endif + +#ifdef GPIOC +#define PC0 MCU_GPIO_PORTC(0) +#define PC1 MCU_GPIO_PORTC(1) +#define PC2 MCU_GPIO_PORTC(2) +#define PC3 MCU_GPIO_PORTC(3) +#define PC4 MCU_GPIO_PORTC(4) +#define PC5 MCU_GPIO_PORTC(5) +#define PC6 MCU_GPIO_PORTC(6) +#define PC7 MCU_GPIO_PORTC(7) +#define PC8 MCU_GPIO_PORTC(8) +#define PC9 MCU_GPIO_PORTC(9) +#define PC10 MCU_GPIO_PORTC(10) +#define PC11 MCU_GPIO_PORTC(11) +#define PC12 MCU_GPIO_PORTC(12) +#define PC13 MCU_GPIO_PORTC(13) +#define PC14 MCU_GPIO_PORTC(14) +#define PC15 MCU_GPIO_PORTC(15) +#endif + +#ifdef GPIOD +#define PD0 MCU_GPIO_PORTD(0) +#define PD1 MCU_GPIO_PORTD(1) +#define PD2 MCU_GPIO_PORTD(2) +#define PD3 MCU_GPIO_PORTD(3) +#define PD4 MCU_GPIO_PORTD(4) +#define PD5 MCU_GPIO_PORTD(5) +#define PD6 MCU_GPIO_PORTD(6) +#define PD7 MCU_GPIO_PORTD(7) +#define PD8 MCU_GPIO_PORTD(8) +#define PD9 MCU_GPIO_PORTD(9) +#define PD10 MCU_GPIO_PORTD(10) +#define PD11 MCU_GPIO_PORTD(11) +#define PD12 MCU_GPIO_PORTD(12) +#define PD13 MCU_GPIO_PORTD(13) +#define PD14 MCU_GPIO_PORTD(14) +#define PD15 MCU_GPIO_PORTD(15) +#endif + +#ifdef GPIOE +#define PE0 MCU_GPIO_PORTE(0) +#define PE1 MCU_GPIO_PORTE(1) +#define PE2 MCU_GPIO_PORTE(2) +#define PE3 MCU_GPIO_PORTE(3) +#define PE4 MCU_GPIO_PORTE(4) +#define PE5 MCU_GPIO_PORTE(5) +#define PE6 MCU_GPIO_PORTE(6) +#define PE7 MCU_GPIO_PORTE(7) +#define PE8 MCU_GPIO_PORTE(8) +#define PE9 MCU_GPIO_PORTE(9) +#define PE10 MCU_GPIO_PORTE(10) +#define PE11 MCU_GPIO_PORTE(11) +#define PE12 MCU_GPIO_PORTE(12) +#define PE13 MCU_GPIO_PORTE(13) +#define PE14 MCU_GPIO_PORTE(14) +#define PE15 MCU_GPIO_PORTE(15) +#endif + +#ifdef GPIOF +#define PF0 MCU_GPIO_PORTF(0) +#define PF1 MCU_GPIO_PORTF(1) +#define PF2 MCU_GPIO_PORTF(2) +#define PF3 MCU_GPIO_PORTF(3) +#define PF4 MCU_GPIO_PORTF(4) +#define PF5 MCU_GPIO_PORTF(5) +#define PF6 MCU_GPIO_PORTF(6) +#define PF7 MCU_GPIO_PORTF(7) +#define PF8 MCU_GPIO_PORTF(8) +#define PF9 MCU_GPIO_PORTF(9) +#define PF10 MCU_GPIO_PORTF(10) +#define PF11 MCU_GPIO_PORTF(11) +#define PF12 MCU_GPIO_PORTF(12) +#define PF13 MCU_GPIO_PORTF(13) +#define PF14 MCU_GPIO_PORTF(14) +#define PF15 MCU_GPIO_PORTF(15) +#endif + +#ifdef GPIOG +#define PG0 MCU_GPIO_PORTG(0) +#define PG1 MCU_GPIO_PORTG(1) +#define PG2 MCU_GPIO_PORTG(2) +#define PG3 MCU_GPIO_PORTG(3) +#define PG4 MCU_GPIO_PORTG(4) +#define PG5 MCU_GPIO_PORTG(5) +#define PG6 MCU_GPIO_PORTG(6) +#define PG7 MCU_GPIO_PORTG(7) +#define PG8 MCU_GPIO_PORTG(8) +#define PG9 MCU_GPIO_PORTG(9) +#define PG10 MCU_GPIO_PORTG(10) +#define PG11 MCU_GPIO_PORTG(11) +#define PG12 MCU_GPIO_PORTG(12) +#define PG13 MCU_GPIO_PORTG(13) +#define PG14 MCU_GPIO_PORTG(14) +#define PG15 MCU_GPIO_PORTG(15) +#endif + +#ifdef GPIOH +#define PH0 MCU_GPIO_PORTH(0) +#define PH1 MCU_GPIO_PORTH(1) +#define PH2 MCU_GPIO_PORTH(2) +#define PH3 MCU_GPIO_PORTH(3) +#define PH4 MCU_GPIO_PORTH(4) +#define PH5 MCU_GPIO_PORTH(5) +#define PH6 MCU_GPIO_PORTH(6) +#define PH7 MCU_GPIO_PORTH(7) +#define PH8 MCU_GPIO_PORTH(8) +#define PH9 MCU_GPIO_PORTH(9) +#define PH10 MCU_GPIO_PORTH(10) +#define PH11 MCU_GPIO_PORTH(11) +#define PH12 MCU_GPIO_PORTH(12) +#define PH13 MCU_GPIO_PORTH(13) +#define PH14 MCU_GPIO_PORTH(14) +#define PH15 MCU_GPIO_PORTH(15) +#endif + +#ifdef GPIOI +#define PI0 MCU_GPIO_PORTI(0) +#define PI1 MCU_GPIO_PORTI(1) +#define PI2 MCU_GPIO_PORTI(2) +#define PI3 MCU_GPIO_PORTI(3) +#define PI4 MCU_GPIO_PORTI(4) +#define PI5 MCU_GPIO_PORTI(5) +#define PI6 MCU_GPIO_PORTI(6) +#define PI7 MCU_GPIO_PORTI(7) +#define PI8 MCU_GPIO_PORTI(8) +#define PI9 MCU_GPIO_PORTI(9) +#define PI10 MCU_GPIO_PORTI(10) +#define PI11 MCU_GPIO_PORTI(11) +#define PI12 MCU_GPIO_PORTI(12) +#define PI13 MCU_GPIO_PORTI(13) +#define PI14 MCU_GPIO_PORTI(14) +#define PI15 MCU_GPIO_PORTI(15) +#endif + +#ifndef STM32_PIN_FUN_CFG + +#define STM32_PIN_FUN_CFG(port_n, pin_n, pf, af) \ +extern const struct stm32_pin_cfg _P##port_n##pin_n##_##pf;\ +static stm32_pin_cfg_t const P##port_n##pin_n##_##pf __unused = &_P##port_n##pin_n##_##pf; + +#define STM32_PIN_FUN_CFG_OD(port_n, pin_n, pf, af) \ +extern const struct stm32_pin_cfg _P##port_n##pin_n##_##pf##_OD;\ +static stm32_pin_cfg_t const P##port_n##pin_n##_##pf##_OD __unused = &_P##port_n##pin_n##_##pf##_OD; + +#define STM32_PIN_FUN_CFG_OD_PU(port_n, pin_n, pf, af) \ +extern const struct stm32_pin_cfg _P##port_n##pin_n##_##pf##_OD_PU;\ +static stm32_pin_cfg_t const P##port_n##pin_n##_##pf##_OD_PU __unused = &_P##port_n##pin_n##_##pf##_OD_PU; + +#endif + +#ifdef GPIOA +#ifdef ETH +STM32_PIN_FUN_CFG(A, 0, ETH_CRS, GPIO_AF11_ETH) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(A, 0, SAI2_SD_B, GPIO_AF10_SAI2) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(A, 0, SDMMC2_CMD, GPIO_AF9_SDMMC2) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(A, 0, SPI3_RDY, GPIO_AF6_SPI3) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(A, 0, SPI6_NSS, GPIO_AF5_SPI6) +#endif +#ifdef TIM15 +STM32_PIN_FUN_CFG(A, 0, TIM15_BKIN, GPIO_AF4_TIM15) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(A, 0, TIM2_CH1, GPIO_AF1_TIM2) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(A, 0, TIM2_ETR, GPIO_AF14_TIM2) +#endif +#ifdef TIM5 +STM32_PIN_FUN_CFG(A, 0, TIM5_CH1, GPIO_AF2_TIM5) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(A, 0, TIM8_ETR, GPIO_AF3_TIM8) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(A, 0, UART4_TX, GPIO_AF8_UART4) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(A, 0, USART2_CTS, GPIO_AF7_USART2) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(A, 0, USART2_NSS, GPIO_AF7_USART2) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(A, 1, ETH_REF_CLK, GPIO_AF11_ETH) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(A, 1, ETH_RX_CLK, GPIO_AF11_ETH) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(A, 1, LPTIM1_IN1, GPIO_AF5_LPTIM1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(A, 1, OCTOSPI1_DQS, GPIO_AF6_OCTOSPI1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(A, 1, OCTOSPI1_IO3, GPIO_AF9_OCTOSPI1) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(A, 1, SAI2_MCLK_B, GPIO_AF10_SAI2) +#endif +#ifdef TIM15 +STM32_PIN_FUN_CFG(A, 1, TIM15_CH1N, GPIO_AF4_TIM15) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(A, 1, TIM2_CH2, GPIO_AF1_TIM2) +#endif +#ifdef TIM5 +STM32_PIN_FUN_CFG(A, 1, TIM5_CH2, GPIO_AF2_TIM5) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(A, 1, UART4_RX, GPIO_AF8_UART4) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(A, 1, USART2_DE, GPIO_AF7_USART2) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(A, 1, USART2_RTS, GPIO_AF7_USART2) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(A, 10, DCMI_D1, GPIO_AF13_DCMI) +#endif +#ifdef FDCAN2 +STM32_PIN_FUN_CFG(A, 10, FDCAN2_TX, GPIO_AF9_FDCAN2) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(A, 10, LPTIM2_IN2, GPIO_AF4_LPTIM2) +#endif +#ifdef LPUART1 +STM32_PIN_FUN_CFG(A, 10, LPUART1_RX, GPIO_AF3_LPUART1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(A, 10, PSSI_D1, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(A, 10, SDMMC1_D0, GPIO_AF12_SDMMC1) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(A, 10, TIM1_CH3, GPIO_AF1_TIM1) +#endif +#ifdef UCPD1 +STM32_PIN_FUN_CFG(A, 10, UCPD1_FRSTX, GPIO_AF6_UCPD1) +#endif +#ifdef USART1 +STM32_PIN_FUN_CFG(A, 10, USART1_RX, GPIO_AF7_USART1) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(A, 11, FDCAN1_RX, GPIO_AF9_FDCAN1) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(A, 11, I2S2_WS, GPIO_AF5_SPI2) +#endif +#ifdef LPUART1 +STM32_PIN_FUN_CFG(A, 11, LPUART1_CTS, GPIO_AF3_LPUART1) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(A, 11, SPI2_NSS, GPIO_AF5_SPI2) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(A, 11, TIM1_CH4, GPIO_AF1_TIM1) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(A, 11, UART4_RX, GPIO_AF6_UART4) +#endif +#ifdef USART1 +STM32_PIN_FUN_CFG(A, 11, USART1_CTS, GPIO_AF7_USART1) +#endif +#ifdef USART1 +STM32_PIN_FUN_CFG(A, 11, USART1_NSS, GPIO_AF7_USART1) +#endif +#ifdef USB +STM32_PIN_FUN_CFG(A, 11, USB_DM, GPIO_AF10_USB) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(A, 12, FDCAN1_TX, GPIO_AF9_FDCAN1) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(A, 12, I2S2_CK, GPIO_AF5_SPI2) +#endif +#ifdef LPUART1 +STM32_PIN_FUN_CFG(A, 12, LPUART1_DE, GPIO_AF3_LPUART1) +#endif +#ifdef LPUART1 +STM32_PIN_FUN_CFG(A, 12, LPUART1_RTS, GPIO_AF3_LPUART1) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(A, 12, SAI2_FS_B, GPIO_AF8_SAI2) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(A, 12, SPI2_SCK, GPIO_AF5_SPI2) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(A, 12, TIM1_ETR, GPIO_AF1_TIM1) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(A, 12, UART4_TX, GPIO_AF6_UART4) +#endif +#ifdef USART1 +STM32_PIN_FUN_CFG(A, 12, USART1_DE, GPIO_AF7_USART1) +#endif +#ifdef USART1 +STM32_PIN_FUN_CFG(A, 12, USART1_RTS, GPIO_AF7_USART1) +#endif +#ifdef USB +STM32_PIN_FUN_CFG(A, 12, USB_DP, GPIO_AF10_USB) +#endif +#ifdef CEC +STM32_PIN_FUN_CFG(A, 15, CEC, GPIO_AF4_CEC) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(A, 15, DCMI_D11, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(A, 15, FMC_NBL1, GPIO_AF12_FMC) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(A, 15, I2S1_WS, GPIO_AF5_SPI1) +#endif +#ifdef I2S3 +STM32_PIN_FUN_CFG(A, 15, I2S3_WS, GPIO_AF6_SPI3) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(A, 15, LPTIM3_IN2, GPIO_AF2_LPTIM3) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(A, 15, PSSI_D11, GPIO_AF13_PSSI) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(A, 15, SPI1_NSS, GPIO_AF5_SPI1) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(A, 15, SPI3_NSS, GPIO_AF6_SPI3) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(A, 15, SPI6_NSS, GPIO_AF7_SPI6) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(A, 15, TIM2_CH1, GPIO_AF1_TIM2) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(A, 15, TIM2_ETR, GPIO_AF14_TIM2) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(A, 15, UART4_DE, GPIO_AF8_UART4) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(A, 15, UART4_RTS, GPIO_AF8_UART4) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(A, 15, UART7_TX, GPIO_AF11_UART7) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(A, 2, ETH_MDIO, GPIO_AF11_ETH) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(A, 2, LPTIM1_IN2, GPIO_AF5_LPTIM1) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(A, 2, SAI2_SCK_B, GPIO_AF8_SAI2) +#endif +#ifdef TIM15 +STM32_PIN_FUN_CFG(A, 2, TIM15_CH1, GPIO_AF4_TIM15) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(A, 2, TIM2_CH3, GPIO_AF1_TIM2) +#endif +#ifdef TIM5 +STM32_PIN_FUN_CFG(A, 2, TIM5_CH3, GPIO_AF2_TIM5) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(A, 2, USART2_TX, GPIO_AF7_USART2) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(A, 3, ETH_COL, GPIO_AF11_ETH) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(A, 3, I2S2_WS, GPIO_AF5_SPI2) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(A, 3, OCTOSPI1_CLK, GPIO_AF3_OCTOSPI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(A, 3, SAI1_SD_B, GPIO_AF6_SAI1) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(A, 3, SPI2_NSS, GPIO_AF5_SPI2) +#endif +#ifdef TIM15 +STM32_PIN_FUN_CFG(A, 3, TIM15_CH2, GPIO_AF4_TIM15) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(A, 3, TIM2_CH4, GPIO_AF1_TIM2) +#endif +#ifdef TIM5 +STM32_PIN_FUN_CFG(A, 3, TIM5_CH4, GPIO_AF2_TIM5) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(A, 3, USART2_RX, GPIO_AF7_USART2) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(A, 4, DCMI_HSYNC, GPIO_AF13_DCMI) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(A, 4, I2S1_WS, GPIO_AF5_SPI1) +#endif +#ifdef I2S3 +STM32_PIN_FUN_CFG(A, 4, I2S3_WS, GPIO_AF6_SPI3) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(A, 4, LPTIM2_CH1, GPIO_AF3_LPTIM2) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(A, 4, PSSI_DE, GPIO_AF13_PSSI) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(A, 4, SPI1_NSS, GPIO_AF5_SPI1) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(A, 4, SPI3_NSS, GPIO_AF6_SPI3) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(A, 4, SPI6_NSS, GPIO_AF8_SPI6) +#endif +#ifdef TIM5 +STM32_PIN_FUN_CFG(A, 4, TIM5_ETR, GPIO_AF2_TIM5) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(A, 4, USART2_CK, GPIO_AF7_USART2) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(A, 5, ETH_TX_EN, GPIO_AF11_ETH) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(A, 5, I2S1_CK, GPIO_AF5_SPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(A, 5, PSSI_D14, GPIO_AF13_PSSI) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(A, 5, SPI1_SCK, GPIO_AF5_SPI1) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(A, 5, SPI6_SCK, GPIO_AF8_SPI6) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(A, 5, TIM2_CH1, GPIO_AF1_TIM2) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(A, 5, TIM2_ETR, GPIO_AF14_TIM2) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(A, 5, TIM8_CH1N, GPIO_AF3_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(A, 6, DCMI_PIXCLK, GPIO_AF13_DCMI) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(A, 6, I2S1_SDI, GPIO_AF5_SPI1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(A, 6, OCTOSPI1_IO3, GPIO_AF6_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(A, 6, PSSI_PDCK, GPIO_AF13_PSSI) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(A, 6, SPI1_MISO, GPIO_AF5_SPI1) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(A, 6, SPI6_MISO, GPIO_AF8_SPI6) +#endif +#ifdef TIM13 +STM32_PIN_FUN_CFG(A, 6, TIM13_CH1, GPIO_AF9_TIM13) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(A, 6, TIM1_BKIN, GPIO_AF1_TIM1) +#endif +#ifdef TIM3 +STM32_PIN_FUN_CFG(A, 6, TIM3_CH1, GPIO_AF2_TIM3) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(A, 6, TIM8_BKIN, GPIO_AF3_TIM8) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(A, 6, USART11_TX, GPIO_AF7_USART11) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(A, 7, ETH_CRS_DV, GPIO_AF11_ETH) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(A, 7, ETH_RX_DV, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(A, 7, FMC_NWE, GPIO_AF13_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(A, 7, FMC_SDNWE, GPIO_AF12_FMC) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(A, 7, I2S1_SDO, GPIO_AF5_SPI1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(A, 7, OCTOSPI1_IO2, GPIO_AF10_OCTOSPI1) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(A, 7, SPI1_MOSI, GPIO_AF5_SPI1) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(A, 7, SPI6_MOSI, GPIO_AF8_SPI6) +#endif +#ifdef TIM14 +STM32_PIN_FUN_CFG(A, 7, TIM14_CH1, GPIO_AF9_TIM14) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(A, 7, TIM1_CH1N, GPIO_AF1_TIM1) +#endif +#ifdef TIM3 +STM32_PIN_FUN_CFG(A, 7, TIM3_CH2, GPIO_AF2_TIM3) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(A, 7, TIM8_CH1N, GPIO_AF3_TIM8) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(A, 7, USART11_RX, GPIO_AF7_USART11) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(A, 8, DCMI_D3, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(A, 8, FMC_NOE, GPIO_AF12_FMC) +#endif +#ifdef I2C3 +STM32_PIN_FUN_CFG(A, 8, I2C3_SCL, GPIO_AF4_I2C3) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(A, 8, PSSI_D3, GPIO_AF13_PSSI) +#endif +#ifdef RCC +STM32_PIN_FUN_CFG(A, 8, RCC_MCO_1, GPIO_AF0_MCO) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(A, 8, SPI1_RDY, GPIO_AF5_SPI1) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(A, 8, TIM1_CH1, GPIO_AF1_TIM1) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(A, 8, TIM8_BKIN2, GPIO_AF3_TIM8) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(A, 8, UART7_RX, GPIO_AF11_UART7) +#endif +#ifdef USART1 +STM32_PIN_FUN_CFG(A, 8, USART1_CK, GPIO_AF7_USART1) +#endif +#ifdef USB +STM32_PIN_FUN_CFG(A, 8, USB_SOF, GPIO_AF10_USB) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(A, 9, DCMI_D0, GPIO_AF13_DCMI) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(A, 9, ETH_TX_ER, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(A, 9, FMC_NWE, GPIO_AF12_FMC) +#endif +#ifdef I2C3 +STM32_PIN_FUN_CFG(A, 9, I2C3_SMBA, GPIO_AF4_I2C3) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(A, 9, I2S2_CK, GPIO_AF5_SPI2) +#endif +#ifdef LPUART1 +STM32_PIN_FUN_CFG(A, 9, LPUART1_TX, GPIO_AF3_LPUART1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(A, 9, PSSI_D0, GPIO_AF13_PSSI) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(A, 9, SPI2_SCK, GPIO_AF5_SPI2) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(A, 9, TIM1_CH2, GPIO_AF1_TIM1) +#endif +#ifdef USART1 +STM32_PIN_FUN_CFG(A, 9, USART1_TX, GPIO_AF7_USART1) +#endif +#endif /* GPIOA */ + +/* Port B definitions */ +#ifdef GPIOB +#ifdef ETH +STM32_PIN_FUN_CFG(B, 0, ETH_RXD2, GPIO_AF11_ETH) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(B, 0, LPTIM3_CH1, GPIO_AF14_LPTIM3) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(B, 0, OCTOSPI1_IO1, GPIO_AF6_OCTOSPI1) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(B, 0, TIM1_CH2N, GPIO_AF1_TIM1) +#endif +#ifdef TIM3 +STM32_PIN_FUN_CFG(B, 0, TIM3_CH3, GPIO_AF2_TIM3) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(B, 0, TIM8_CH2N, GPIO_AF3_TIM8) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(B, 0, UART4_CTS, GPIO_AF8_UART4) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(B, 0, USART11_CK, GPIO_AF7_USART11) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(B, 1, ETH_RXD3, GPIO_AF11_ETH) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(B, 1, LPTIM3_CH2, GPIO_AF14_LPTIM3) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(B, 1, OCTOSPI1_IO0, GPIO_AF6_OCTOSPI1) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(B, 1, TIM1_CH3N, GPIO_AF1_TIM1) +#endif +#ifdef TIM3 +STM32_PIN_FUN_CFG(B, 1, TIM3_CH4, GPIO_AF2_TIM3) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(B, 1, TIM8_CH3N, GPIO_AF3_TIM8) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(B, 10, ETH_RX_ER, GPIO_AF11_ETH) +#endif +#ifdef I2C2 +STM32_PIN_FUN_CFG(B, 10, I2C2_SCL, GPIO_AF4_I2C2) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(B, 10, I2S2_CK, GPIO_AF5_SPI2) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(B, 10, LPTIM2_IN1, GPIO_AF3_LPTIM2) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(B, 10, LPTIM3_CH1, GPIO_AF2_LPTIM3) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(B, 10, OCTOSPI1_NCS, GPIO_AF9_OCTOSPI1) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(B, 10, SPI2_SCK, GPIO_AF5_SPI2) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(B, 10, TIM2_CH3, GPIO_AF1_TIM2) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(B, 10, USART3_TX, GPIO_AF7_USART3) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(B, 11, ETH_TX_EN, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(B, 11, FMC_NBL1, GPIO_AF12_FMC) +#endif +#ifdef I2C2 +STM32_PIN_FUN_CFG(B, 11, I2C2_SDA, GPIO_AF4_I2C2) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(B, 11, LPTIM2_ETR, GPIO_AF3_LPTIM2) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(B, 11, SPI2_RDY, GPIO_AF5_SPI2) +#endif +#ifdef SPI4 +STM32_PIN_FUN_CFG(B, 11, SPI4_RDY, GPIO_AF6_SPI4) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(B, 11, TIM2_CH4, GPIO_AF1_TIM2) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(B, 11, USART3_RX, GPIO_AF7_USART3) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(B, 12, ETH_TXD0, GPIO_AF11_ETH) +#endif +#ifdef FDCAN2 +STM32_PIN_FUN_CFG(B, 12, FDCAN2_RX, GPIO_AF9_FDCAN2) +#endif +#ifdef I2C2 +STM32_PIN_FUN_CFG(B, 12, I2C2_SDA, GPIO_AF4_I2C2) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(B, 12, I2S2_WS, GPIO_AF5_SPI2) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(B, 12, OCTOSPI1_NCLK, GPIO_AF3_OCTOSPI1) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(B, 12, SPI2_NSS, GPIO_AF5_SPI2) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(B, 12, TIM1_BKIN, GPIO_AF1_TIM1) +#endif +#ifdef UART5 +STM32_PIN_FUN_CFG(B, 12, UART5_RX, GPIO_AF14_UART5) +#endif +#ifdef UCPD1 +STM32_PIN_FUN_CFG(B, 12, UCPD1_FRSTX, GPIO_AF6_UCPD1) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(B, 12, USART3_CK, GPIO_AF7_USART3) +#endif +#ifdef FDCAN2 +STM32_PIN_FUN_CFG(B, 13, FDCAN2_TX, GPIO_AF9_FDCAN2) +#endif +#ifdef I2C2 +STM32_PIN_FUN_CFG(B, 13, I2C2_SMBA, GPIO_AF4_I2C2) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(B, 13, I2S2_CK, GPIO_AF5_SPI2) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(B, 13, LPTIM2_CH1, GPIO_AF3_LPTIM2) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(B, 13, LPTIM3_IN1, GPIO_AF2_LPTIM3) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(B, 13, SDMMC1_D0, GPIO_AF12_SDMMC1) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(B, 13, SPI2_SCK, GPIO_AF5_SPI2) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(B, 13, TIM1_CH1N, GPIO_AF1_TIM1) +#endif +#ifdef UART5 +STM32_PIN_FUN_CFG(B, 13, UART5_TX, GPIO_AF14_UART5) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(B, 13, USART3_CTS, GPIO_AF7_USART3) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(B, 13, USART3_NSS, GPIO_AF7_USART3) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(B, 14, I2S2_SDI, GPIO_AF5_SPI2) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(B, 14, LPTIM3_ETR, GPIO_AF14_LPTIM3) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(B, 14, SDMMC2_D0, GPIO_AF9_SDMMC2) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(B, 14, SPI2_MISO, GPIO_AF5_SPI2) +#endif +#ifdef TIM12 +STM32_PIN_FUN_CFG(B, 14, TIM12_CH1, GPIO_AF2_TIM12) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(B, 14, TIM1_CH2N, GPIO_AF1_TIM1) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(B, 14, TIM8_CH2N, GPIO_AF3_TIM8) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(B, 14, UART4_DE, GPIO_AF8_UART4) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(B, 14, UART4_RTS, GPIO_AF8_UART4) +#endif +#ifdef USART1 +STM32_PIN_FUN_CFG(B, 14, USART1_TX, GPIO_AF4_USART1) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(B, 14, USART3_DE, GPIO_AF7_USART3) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(B, 14, USART3_RTS, GPIO_AF7_USART3) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(B, 15, DCMI_D2, GPIO_AF13_DCMI) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(B, 15, ETH_TXD1, GPIO_AF11_ETH) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(B, 15, I2S2_SDO, GPIO_AF5_SPI2) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(B, 15, OCTOSPI1_CLK, GPIO_AF10_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(B, 15, PSSI_D2, GPIO_AF13_PSSI) +#endif +#ifdef RTC +STM32_PIN_FUN_CFG(B, 15, RTC_REFIN, GPIO_AF0_RTC_50Hz) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(B, 15, SDMMC2_D1, GPIO_AF9_SDMMC2) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(B, 15, SPI2_MOSI, GPIO_AF5_SPI2) +#endif +#ifdef TIM12 +STM32_PIN_FUN_CFG(B, 15, TIM12_CH2, GPIO_AF2_TIM12) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(B, 15, TIM1_CH3N, GPIO_AF1_TIM1) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(B, 15, TIM8_CH3N, GPIO_AF3_TIM8) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(B, 15, UART4_CTS, GPIO_AF8_UART4) +#endif +#ifdef UART5 +STM32_PIN_FUN_CFG(B, 15, UART5_RX, GPIO_AF14_UART5) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(B, 15, USART11_CTS, GPIO_AF7_USART11) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(B, 15, USART11_NSS, GPIO_AF7_USART11) +#endif +#ifdef USART1 +STM32_PIN_FUN_CFG(B, 15, USART1_RX, GPIO_AF4_USART1) +#endif +#ifdef I2S3 +STM32_PIN_FUN_CFG(B, 2, I2S3_SDO, GPIO_AF7_SPI3) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(B, 2, LPTIM1_CH1, GPIO_AF5_LPTIM1) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(B, 2, LPTIM5_ETR, GPIO_AF13_LPTIM5) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(B, 2, OCTOSPI1_CLK, GPIO_AF9_OCTOSPI1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(B, 2, OCTOSPI1_DQS, GPIO_AF10_OCTOSPI1) +#endif +#ifdef RTC +STM32_PIN_FUN_CFG(B, 2, RTC_OUT2, GPIO_AF0_RTC_50Hz) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(B, 2, SAI1_D1, GPIO_AF2_SAI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(B, 2, SAI1_SD_A, GPIO_AF6_SAI1) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(B, 2, SDMMC1_CMD, GPIO_AF12_SDMMC1) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(B, 2, SPI1_RDY, GPIO_AF4_SPI1) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(B, 2, SPI3_MOSI, GPIO_AF7_SPI3) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(B, 2, TIM8_CH4N, GPIO_AF3_TIM8) +#endif +#ifdef CRS +STM32_PIN_FUN_CFG(B, 3, CRS_SYNC, GPIO_AF10_CRS) +#endif +#ifdef I2C2 +STM32_PIN_FUN_CFG(B, 3, I2C2_SDA, GPIO_AF4_I2C2) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(B, 3, I2S1_CK, GPIO_AF5_SPI1) +#endif +#ifdef I2S3 +STM32_PIN_FUN_CFG(B, 3, I2S3_CK, GPIO_AF6_SPI3) +#endif +#ifdef LPTIM6 +STM32_PIN_FUN_CFG(B, 3, LPTIM6_ETR, GPIO_AF14_LPTIM6) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(B, 3, SDMMC2_D2, GPIO_AF9_SDMMC2) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(B, 3, SPI1_SCK, GPIO_AF5_SPI1) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(B, 3, SPI3_SCK, GPIO_AF6_SPI3) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(B, 3, SPI6_SCK, GPIO_AF8_SPI6) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(B, 3, TIM2_CH2, GPIO_AF1_TIM2) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(B, 3, UART12_CTS, GPIO_AF7_UART12) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(B, 3, UART7_RX, GPIO_AF11_UART7) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(B, 4, DCMI_D7, GPIO_AF13_DCMI) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(B, 4, I2S1_SDI, GPIO_AF5_SPI1) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(B, 4, I2S2_WS, GPIO_AF7_SPI2) +#endif +#ifdef I2S3 +STM32_PIN_FUN_CFG(B, 4, I2S3_SDI, GPIO_AF6_SPI3) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(B, 4, LPTIM1_CH2, GPIO_AF4_LPTIM1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(B, 4, OCTOSPI1_CLK, GPIO_AF3_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(B, 4, PSSI_D7, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(B, 4, SDMMC2_D3, GPIO_AF9_SDMMC2) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(B, 4, SPI1_MISO, GPIO_AF5_SPI1) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(B, 4, SPI2_NSS, GPIO_AF7_SPI2) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(B, 4, SPI3_MISO, GPIO_AF6_SPI3) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(B, 4, SPI6_MISO, GPIO_AF8_SPI6) +#endif +#ifdef TIM16 +STM32_PIN_FUN_CFG(B, 4, TIM16_BKIN, GPIO_AF1_TIM16) +#endif +#ifdef TIM3 +STM32_PIN_FUN_CFG(B, 4, TIM3_CH1, GPIO_AF2_TIM3) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(B, 4, UART7_TX, GPIO_AF11_UART7) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(B, 5, DCMI_D10, GPIO_AF13_DCMI) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(B, 5, ETH_PPS_OUT, GPIO_AF11_ETH) +#endif +#ifdef FDCAN2 +STM32_PIN_FUN_CFG(B, 5, FDCAN2_RX, GPIO_AF9_FDCAN2) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(B, 5, FMC_SDCKE1, GPIO_AF12_FMC) +#endif +#ifdef I2C1 +STM32_PIN_FUN_CFG(B, 5, I2C1_SMBA, GPIO_AF4_I2C1) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(B, 5, I2C4_SMBA, GPIO_AF6_I2C4) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(B, 5, I2S1_SDO, GPIO_AF5_SPI1) +#endif +#ifdef I2S3 +STM32_PIN_FUN_CFG(B, 5, I2S3_SDO, GPIO_AF7_SPI3) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(B, 5, OCTOSPI1_NCLK, GPIO_AF3_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(B, 5, PSSI_D10, GPIO_AF13_PSSI) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(B, 5, SPI1_MOSI, GPIO_AF5_SPI1) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(B, 5, SPI3_MOSI, GPIO_AF7_SPI3) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(B, 5, SPI6_MOSI, GPIO_AF8_SPI6) +#endif +#ifdef TIM17 +STM32_PIN_FUN_CFG(B, 5, TIM17_BKIN, GPIO_AF1_TIM17) +#endif +#ifdef TIM3 +STM32_PIN_FUN_CFG(B, 5, TIM3_CH2, GPIO_AF2_TIM3) +#endif +#ifdef UART5 +STM32_PIN_FUN_CFG(B, 5, UART5_RX, GPIO_AF14_UART5) +#endif +#ifdef CEC +STM32_PIN_FUN_CFG(B, 6, CEC, GPIO_AF5_CEC) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(B, 6, DCMI_D5, GPIO_AF13_DCMI) +#endif +#ifdef FDCAN2 +STM32_PIN_FUN_CFG(B, 6, FDCAN2_TX, GPIO_AF9_FDCAN2) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(B, 6, FMC_SDNE1, GPIO_AF12_FMC) +#endif +#ifdef I2C1 +STM32_PIN_FUN_CFG(B, 6, I2C1_SCL, GPIO_AF4_I2C1) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(B, 6, I2C4_SCL, GPIO_AF6_I2C4) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(B, 6, I3C1_SCL, GPIO_AF3_I3C1) +#endif +#ifdef LPUART1 +STM32_PIN_FUN_CFG(B, 6, LPUART1_TX, GPIO_AF8_LPUART1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(B, 6, OCTOSPI1_NCS, GPIO_AF10_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(B, 6, PSSI_D5, GPIO_AF13_PSSI) +#endif +#ifdef TIM16 +STM32_PIN_FUN_CFG(B, 6, TIM16_CH1N, GPIO_AF1_TIM16) +#endif +#ifdef TIM4 +STM32_PIN_FUN_CFG(B, 6, TIM4_CH1, GPIO_AF2_TIM4) +#endif +#ifdef UART5 +STM32_PIN_FUN_CFG(B, 6, UART5_TX, GPIO_AF14_UART5) +#endif +#ifdef USART1 +STM32_PIN_FUN_CFG(B, 6, USART1_TX, GPIO_AF7_USART1) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(B, 7, DCMI_VSYNC, GPIO_AF13_DCMI) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(B, 7, FDCAN1_TX, GPIO_AF9_FDCAN1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(B, 7, FMC_NL, GPIO_AF12_FMC) +#endif +#ifdef I2C1 +STM32_PIN_FUN_CFG(B, 7, I2C1_SDA, GPIO_AF4_I2C1) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(B, 7, I2C4_SDA, GPIO_AF6_I2C4) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(B, 7, I3C1_SDA, GPIO_AF3_I3C1) +#endif +#ifdef LPUART1 +STM32_PIN_FUN_CFG(B, 7, LPUART1_RX, GPIO_AF8_LPUART1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(B, 7, PSSI_RDY, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(B, 7, SDMMC2_CKIN, GPIO_AF11_SDMMC2) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(B, 7, SDMMC2_D5, GPIO_AF10_SDMMC2) +#endif +#ifdef TIM17 +STM32_PIN_FUN_CFG(B, 7, TIM17_CH1N, GPIO_AF1_TIM17) +#endif +#ifdef TIM4 +STM32_PIN_FUN_CFG(B, 7, TIM4_CH2, GPIO_AF2_TIM4) +#endif +#ifdef USART1 +STM32_PIN_FUN_CFG(B, 7, USART1_RX, GPIO_AF7_USART1) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(B, 8, DCMI_D6, GPIO_AF13_DCMI) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(B, 8, ETH_TXD3, GPIO_AF11_ETH) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(B, 8, FDCAN1_RX, GPIO_AF9_FDCAN1) +#endif +#ifdef I2C1 +STM32_PIN_FUN_CFG(B, 8, I2C1_SCL, GPIO_AF4_I2C1) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(B, 8, I2C4_SCL, GPIO_AF6_I2C4) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(B, 8, I3C1_SCL, GPIO_AF3_I3C1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(B, 8, PSSI_D6, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(B, 8, SDMMC1_CKIN, GPIO_AF7_SDMMC1) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(B, 8, SDMMC1_D4, GPIO_AF12_SDMMC1) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(B, 8, SDMMC2_D4, GPIO_AF10_SDMMC2) +#endif +#ifdef SPI4 +STM32_PIN_FUN_CFG(B, 8, SPI4_RDY, GPIO_AF5_SPI4) +#endif +#ifdef TIM16 +STM32_PIN_FUN_CFG(B, 8, TIM16_CH1, GPIO_AF1_TIM16) +#endif +#ifdef TIM4 +STM32_PIN_FUN_CFG(B, 8, TIM4_CH3, GPIO_AF2_TIM4) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(B, 8, UART4_RX, GPIO_AF8_UART4) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(B, 9, DCMI_D7, GPIO_AF13_DCMI) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(B, 9, FDCAN1_TX, GPIO_AF9_FDCAN1) +#endif +#ifdef I2C1 +STM32_PIN_FUN_CFG(B, 9, I2C1_SDA, GPIO_AF4_I2C1) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(B, 9, I2C4_SDA, GPIO_AF6_I2C4) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(B, 9, I2S2_WS, GPIO_AF5_SPI2) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(B, 9, I3C1_SDA, GPIO_AF3_I3C1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(B, 9, PSSI_D7, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(B, 9, SDMMC1_CDIR, GPIO_AF7_SDMMC1) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(B, 9, SDMMC1_D5, GPIO_AF12_SDMMC1) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(B, 9, SDMMC2_CKIN, GPIO_AF11_SDMMC2) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(B, 9, SDMMC2_D5, GPIO_AF10_SDMMC2) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(B, 9, SPI2_NSS, GPIO_AF5_SPI2) +#endif +#ifdef TIM17 +STM32_PIN_FUN_CFG(B, 9, TIM17_CH1, GPIO_AF1_TIM17) +#endif +#ifdef TIM4 +STM32_PIN_FUN_CFG(B, 9, TIM4_CH4, GPIO_AF2_TIM4) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(B, 9, UART4_TX, GPIO_AF8_UART4) +#endif +#endif /* GPIOB */ + +/* Port C definitions */ +#ifdef GPIOC +#ifdef FMC +STM32_PIN_FUN_CFG(C, 0, FMC_A25, GPIO_AF9_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 0, FMC_SDNWE, GPIO_AF12_FMC) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 0, OCTOSPI1_IO7, GPIO_AF10_OCTOSPI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(C, 0, SAI1_MCLK_A, GPIO_AF6_SAI1) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(C, 0, SAI2_FS_B, GPIO_AF8_SAI2) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(C, 0, SPI2_RDY, GPIO_AF7_SPI2) +#endif +#ifdef TIM16 +STM32_PIN_FUN_CFG(C, 0, TIM16_BKIN, GPIO_AF1_TIM16) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(C, 1, ETH_MDC, GPIO_AF11_ETH) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(C, 1, I2S2_SDO, GPIO_AF5_SPI2) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 1, OCTOSPI1_IO4, GPIO_AF10_OCTOSPI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(C, 1, SAI1_D1, GPIO_AF2_SAI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(C, 1, SAI1_SD_A, GPIO_AF6_SAI1) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(C, 1, SAI2_SD_A, GPIO_AF8_SAI2) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(C, 1, SDMMC2_CK, GPIO_AF9_SDMMC2) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(C, 1, SPI2_MOSI, GPIO_AF5_SPI2) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(C, 1, USART11_DE, GPIO_AF7_USART11) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(C, 1, USART11_RTS, GPIO_AF7_USART11) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(C, 10, DCMI_D8, GPIO_AF13_DCMI) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(C, 10, ETH_TXD0, GPIO_AF11_ETH) +#endif +#ifdef I2S3 +STM32_PIN_FUN_CFG(C, 10, I2S3_CK, GPIO_AF6_SPI3) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(C, 10, LPTIM3_ETR, GPIO_AF2_LPTIM3) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 10, OCTOSPI1_IO1, GPIO_AF9_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(C, 10, PSSI_D8, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(C, 10, SDMMC1_D2, GPIO_AF12_SDMMC1) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(C, 10, SPI3_SCK, GPIO_AF6_SPI3) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(C, 10, UART4_TX, GPIO_AF8_UART4) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(C, 10, USART3_TX, GPIO_AF7_USART3) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(C, 11, DCMI_D4, GPIO_AF13_DCMI) +#endif +#ifdef I2S3 +STM32_PIN_FUN_CFG(C, 11, I2S3_SDI, GPIO_AF6_SPI3) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(C, 11, LPTIM3_IN1, GPIO_AF2_LPTIM3) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 11, OCTOSPI1_NCS, GPIO_AF9_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(C, 11, PSSI_D4, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(C, 11, SDMMC1_D3, GPIO_AF12_SDMMC1) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(C, 11, SPI3_MISO, GPIO_AF6_SPI3) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(C, 11, UART4_RX, GPIO_AF8_UART4) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(C, 11, USART3_RX, GPIO_AF7_USART3) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(C, 12, DCMI_D9, GPIO_AF13_DCMI) +#endif +#ifdef I2S3 +STM32_PIN_FUN_CFG(C, 12, I2S3_SDO, GPIO_AF6_SPI3) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(C, 12, PSSI_D9, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(C, 12, SDMMC1_CK, GPIO_AF12_SDMMC1) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(C, 12, SPI3_MOSI, GPIO_AF6_SPI3) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(C, 12, SPI6_SCK, GPIO_AF5_SPI6) +#endif +#ifdef TIM15 +STM32_PIN_FUN_CFG(C, 12, TIM15_CH1, GPIO_AF2_TIM15) +#endif +#ifdef UART5 +STM32_PIN_FUN_CFG(C, 12, UART5_TX, GPIO_AF8_UART5) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(C, 12, USART3_CK, GPIO_AF7_USART3) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(C, 2, ETH_TXD2, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 2, FMC_SDNE0, GPIO_AF12_FMC) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(C, 2, I2S2_SDI, GPIO_AF5_SPI2) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 2, OCTOSPI1_IO2, GPIO_AF9_OCTOSPI1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 2, OCTOSPI1_IO5, GPIO_AF6_OCTOSPI1) +#endif +#ifdef PWR +STM32_PIN_FUN_CFG(C, 2, PWR_CSLEEP, GPIO_AF0_CSLEEP) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(C, 2, SPI2_MISO, GPIO_AF5_SPI2) +#endif +#ifdef TIM17 +STM32_PIN_FUN_CFG(C, 2, TIM17_CH1, GPIO_AF1_TIM17) +#endif +#ifdef TIM4 +STM32_PIN_FUN_CFG(C, 2, TIM4_CH4, GPIO_AF2_TIM4) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(C, 3, ETH_TX_CLK, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 3, FMC_SDCKE0, GPIO_AF12_FMC) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(C, 3, I2S2_SDO, GPIO_AF5_SPI2) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(C, 3, LPTIM3_CH1, GPIO_AF3_LPTIM3) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 3, OCTOSPI1_IO0, GPIO_AF9_OCTOSPI1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 3, OCTOSPI1_IO6, GPIO_AF6_OCTOSPI1) +#endif +#ifdef PWR +STM32_PIN_FUN_CFG(C, 3, PWR_CSTOP, GPIO_AF0_CSTOP) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(C, 3, SAI1_D3, GPIO_AF2_SAI1) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(C, 3, SPI2_MOSI, GPIO_AF5_SPI2) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(C, 4, ETH_RXD0, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 4, FMC_SDNE0, GPIO_AF12_FMC) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(C, 4, I2S1_MCK, GPIO_AF5_SPI1) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(C, 4, LPTIM2_ETR, GPIO_AF3_LPTIM2) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(C, 4, SAI1_CK1, GPIO_AF2_SAI1) +#endif +#ifdef TIM2 +STM32_PIN_FUN_CFG(C, 4, TIM2_CH4, GPIO_AF1_TIM2) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(C, 4, USART3_RX, GPIO_AF7_USART3) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(C, 5, ETH_RXD1, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 5, FMC_SDCKE0, GPIO_AF12_FMC) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 5, OCTOSPI1_DQS, GPIO_AF10_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(C, 5, PSSI_D15, GPIO_AF4_PSSI) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(C, 5, SAI1_D3, GPIO_AF2_SAI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(C, 5, SAI1_FS_A, GPIO_AF6_SAI1) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(C, 5, TIM1_CH4N, GPIO_AF1_TIM1) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(C, 5, UART12_DE, GPIO_AF7_UART12) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(C, 5, UART12_RTS, GPIO_AF7_UART12) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(C, 6, DCMI_D0, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 6, FMC_NWAIT, GPIO_AF9_FMC) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(C, 6, I2S2_MCK, GPIO_AF5_SPI2) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 6, OCTOSPI1_IO5, GPIO_AF11_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(C, 6, PSSI_D0, GPIO_AF13_PSSI) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(C, 6, SAI1_SCK_A, GPIO_AF6_SAI1) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(C, 6, SDMMC1_D0DIR, GPIO_AF8_SDMMC1) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(C, 6, SDMMC1_D6, GPIO_AF12_SDMMC1) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(C, 6, SDMMC2_D6, GPIO_AF10_SDMMC2) +#endif +#ifdef TIM3 +STM32_PIN_FUN_CFG(C, 6, TIM3_CH1, GPIO_AF2_TIM3) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(C, 6, TIM8_CH1, GPIO_AF3_TIM8) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(C, 6, USART6_TX, GPIO_AF7_USART6) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(C, 7, DCMI_D1, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 7, FMC_NE1, GPIO_AF9_FMC) +#endif +#ifdef I2S3 +STM32_PIN_FUN_CFG(C, 7, I2S3_MCK, GPIO_AF6_SPI3) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 7, OCTOSPI1_IO6, GPIO_AF11_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(C, 7, PSSI_D1, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(C, 7, SDMMC1_D123DIR, GPIO_AF8_SDMMC1) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(C, 7, SDMMC1_D7, GPIO_AF12_SDMMC1) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(C, 7, SDMMC2_D7, GPIO_AF10_SDMMC2) +#endif +#ifdef TIM3 +STM32_PIN_FUN_CFG(C, 7, TIM3_CH2, GPIO_AF2_TIM3) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(C, 7, TIM8_CH2, GPIO_AF3_TIM8) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(C, 7, USART6_RX, GPIO_AF7_USART6) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(C, 8, DCMI_D2, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 8, FMC_ALE, GPIO_AF11_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 8, FMC_INT, GPIO_AF10_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 8, FMC_NCE, GPIO_AF9_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 8, FMC_NE2, GPIO_AF9_FMC) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(C, 8, PSSI_D2, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(C, 8, SDMMC1_D0, GPIO_AF12_SDMMC1) +#endif +#ifdef TIM3 +STM32_PIN_FUN_CFG(C, 8, TIM3_CH3, GPIO_AF2_TIM3) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(C, 8, TIM8_CH3, GPIO_AF3_TIM8) +#endif +#ifdef UART5 +STM32_PIN_FUN_CFG(C, 8, UART5_DE, GPIO_AF8_UART5) +#endif +#ifdef UART5 +STM32_PIN_FUN_CFG(C, 8, UART5_RTS, GPIO_AF8_UART5) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(C, 8, USART6_CK, GPIO_AF7_USART6) +#endif +#ifdef AUDIOCLK +STM32_PIN_FUN_CFG(C, 9, AUDIOCLK, GPIO_AF5_SPI1) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(C, 9, DCMI_D3, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(C, 9, FMC_CLE, GPIO_AF11_FMC) +#endif +#ifdef I2C3 +STM32_PIN_FUN_CFG(C, 9, I2C3_SDA, GPIO_AF4_I2C3) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(C, 9, OCTOSPI1_IO0, GPIO_AF9_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(C, 9, PSSI_D3, GPIO_AF13_PSSI) +#endif +#ifdef RCC +STM32_PIN_FUN_CFG(C, 9, RCC_MCO_2, GPIO_AF0_MCO) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(C, 9, SDMMC1_D1, GPIO_AF12_SDMMC1) +#endif +#ifdef TIM3 +STM32_PIN_FUN_CFG(C, 9, TIM3_CH4, GPIO_AF2_TIM3) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(C, 9, TIM8_CH4, GPIO_AF3_TIM8) +#endif +#ifdef UART5 +STM32_PIN_FUN_CFG(C, 9, UART5_CTS, GPIO_AF8_UART5) +#endif +#endif /* GPIOC */ + +/* Port D definitions */ +#ifdef GPIOD +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(D, 0, FDCAN1_RX, GPIO_AF9_FDCAN1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 0, FMC_D2, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 0, FMC_DA2, GPIO_AF12_FMC) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(D, 0, TIM8_CH4N, GPIO_AF3_TIM8) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(D, 0, UART4_RX, GPIO_AF8_UART4) +#endif +#ifdef UART9 +STM32_PIN_FUN_CFG(D, 0, UART9_CTS, GPIO_AF11_UART9) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(D, 1, FDCAN1_TX, GPIO_AF9_FDCAN1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 1, FMC_D3, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 1, FMC_DA3, GPIO_AF12_FMC) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(D, 1, UART4_TX, GPIO_AF8_UART4) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 10, FMC_D15, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 10, FMC_DA15, GPIO_AF12_FMC) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(D, 10, LPTIM2_CH2, GPIO_AF3_LPTIM2) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(D, 10, USART3_CK, GPIO_AF7_USART3) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 11, FMC_A16, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 11, FMC_CLE, GPIO_AF12_FMC) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(D, 11, I2C4_SMBA, GPIO_AF4_I2C4) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(D, 11, LPTIM2_IN2, GPIO_AF3_LPTIM2) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(D, 11, OCTOSPI1_IO0, GPIO_AF9_OCTOSPI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(D, 11, SAI1_CK1, GPIO_AF2_SAI1) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(D, 11, SAI2_SD_A, GPIO_AF10_SAI2) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(D, 11, UART4_RX, GPIO_AF8_UART4) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(D, 11, USART3_CTS, GPIO_AF7_USART3) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(D, 11, USART3_NSS, GPIO_AF7_USART3) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(D, 12, DCMI_D12, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 12, FMC_A17, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 12, FMC_ALE, GPIO_AF12_FMC) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(D, 12, I2C4_SCL, GPIO_AF4_I2C4) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(D, 12, I3C1_SCL, GPIO_AF5_I3C1) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(D, 12, LPTIM1_IN1, GPIO_AF1_LPTIM1) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(D, 12, LPTIM2_IN1, GPIO_AF3_LPTIM2) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(D, 12, OCTOSPI1_IO1, GPIO_AF9_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(D, 12, PSSI_D12, GPIO_AF13_PSSI) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(D, 12, SAI1_D1, GPIO_AF6_SAI1) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(D, 12, SAI2_FS_A, GPIO_AF10_SAI2) +#endif +#ifdef TIM4 +STM32_PIN_FUN_CFG(D, 12, TIM4_CH1, GPIO_AF2_TIM4) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(D, 12, UART4_TX, GPIO_AF8_UART4) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(D, 12, USART3_DE, GPIO_AF7_USART3) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(D, 12, USART3_RTS, GPIO_AF7_USART3) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(D, 13, DCMI_D13, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 13, FMC_A18, GPIO_AF12_FMC) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(D, 13, I2C4_SDA, GPIO_AF4_I2C4) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(D, 13, I3C1_SDA, GPIO_AF5_I3C1) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(D, 13, LPTIM1_CH1, GPIO_AF1_LPTIM1) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(D, 13, LPTIM2_CH1, GPIO_AF3_LPTIM2) +#endif +#ifdef LPTIM4 +STM32_PIN_FUN_CFG(D, 13, LPTIM4_IN1, GPIO_AF14_LPTIM4) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(D, 13, OCTOSPI1_IO3, GPIO_AF9_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(D, 13, PSSI_D13, GPIO_AF13_PSSI) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(D, 13, SAI2_SCK_A, GPIO_AF10_SAI2) +#endif +#ifdef TIM4 +STM32_PIN_FUN_CFG(D, 13, TIM4_CH2, GPIO_AF2_TIM4) +#endif +#ifdef UART9 +STM32_PIN_FUN_CFG(D, 13, UART9_DE, GPIO_AF11_UART9) +#endif +#ifdef UART9 +STM32_PIN_FUN_CFG(D, 13, UART9_RTS, GPIO_AF11_UART9) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 14, FMC_D0, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 14, FMC_DA0, GPIO_AF12_FMC) +#endif +#ifdef TIM4 +STM32_PIN_FUN_CFG(D, 14, TIM4_CH3, GPIO_AF2_TIM4) +#endif +#ifdef UART8 +STM32_PIN_FUN_CFG(D, 14, UART8_CTS, GPIO_AF8_UART8) +#endif +#ifdef UART9 +STM32_PIN_FUN_CFG(D, 14, UART9_RX, GPIO_AF11_UART9) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 15, FMC_D1, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 15, FMC_DA1, GPIO_AF12_FMC) +#endif +#ifdef TIM4 +STM32_PIN_FUN_CFG(D, 15, TIM4_CH4, GPIO_AF2_TIM4) +#endif +#ifdef UART8 +STM32_PIN_FUN_CFG(D, 15, UART8_DE, GPIO_AF8_UART8) +#endif +#ifdef UART8 +STM32_PIN_FUN_CFG(D, 15, UART8_RTS, GPIO_AF8_UART8) +#endif +#ifdef UART9 +STM32_PIN_FUN_CFG(D, 15, UART9_TX, GPIO_AF11_UART9) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(D, 2, DCMI_D11, GPIO_AF13_DCMI) +#endif +#ifdef LPTIM4 +STM32_PIN_FUN_CFG(D, 2, LPTIM4_ETR, GPIO_AF14_LPTIM4) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(D, 2, PSSI_D11, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC1 +STM32_PIN_FUN_CFG(D, 2, SDMMC1_CMD, GPIO_AF12_SDMMC1) +#endif +#ifdef TIM15 +STM32_PIN_FUN_CFG(D, 2, TIM15_BKIN, GPIO_AF4_TIM15) +#endif +#ifdef TIM3 +STM32_PIN_FUN_CFG(D, 2, TIM3_ETR, GPIO_AF2_TIM3) +#endif +#ifdef UART5 +STM32_PIN_FUN_CFG(D, 2, UART5_RX, GPIO_AF8_UART5) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(D, 3, DCMI_D5, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 3, FMC_CLK, GPIO_AF12_FMC) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(D, 3, I2S2_CK, GPIO_AF5_SPI2) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(D, 3, PSSI_D5, GPIO_AF13_PSSI) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(D, 3, SPI2_SCK, GPIO_AF5_SPI2) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(D, 3, USART2_CTS, GPIO_AF7_USART2) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(D, 3, USART2_NSS, GPIO_AF7_USART2) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 4, FMC_NOE, GPIO_AF12_FMC) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(D, 4, OCTOSPI1_IO4, GPIO_AF10_OCTOSPI1) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(D, 4, USART2_DE, GPIO_AF7_USART2) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(D, 4, USART2_RTS, GPIO_AF7_USART2) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(D, 5, FDCAN1_TX, GPIO_AF9_FDCAN1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 5, FMC_NWE, GPIO_AF12_FMC) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(D, 5, OCTOSPI1_IO5, GPIO_AF10_OCTOSPI1) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(D, 5, SPI2_RDY, GPIO_AF5_SPI2) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(D, 5, TIM1_CH4N, GPIO_AF1_TIM1) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(D, 5, USART2_TX, GPIO_AF7_USART2) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(D, 6, DCMI_D10, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 6, FMC_NWAIT, GPIO_AF12_FMC) +#endif +#ifdef I2S3 +STM32_PIN_FUN_CFG(D, 6, I2S3_SDO, GPIO_AF5_SPI3) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(D, 6, OCTOSPI1_IO6, GPIO_AF10_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(D, 6, PSSI_D10, GPIO_AF13_PSSI) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(D, 6, SAI1_D1, GPIO_AF2_SAI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(D, 6, SAI1_SD_A, GPIO_AF6_SAI1) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(D, 6, SDMMC2_CK, GPIO_AF11_SDMMC2) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(D, 6, SPI3_MOSI, GPIO_AF5_SPI3) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(D, 6, USART2_RX, GPIO_AF7_USART2) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 7, FMC_NCE, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 7, FMC_NE1, GPIO_AF12_FMC) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(D, 7, I2S1_SDO, GPIO_AF5_SPI1) +#endif +#ifdef LPTIM4 +STM32_PIN_FUN_CFG(D, 7, LPTIM4_OUT, GPIO_AF14_LPTIM4) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(D, 7, OCTOSPI1_IO7, GPIO_AF10_OCTOSPI1) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(D, 7, SDMMC2_CMD, GPIO_AF11_SDMMC2) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(D, 7, SPI1_MOSI, GPIO_AF5_SPI1) +#endif +#ifdef USART2 +STM32_PIN_FUN_CFG(D, 7, USART2_CK, GPIO_AF7_USART2) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 8, FMC_D13, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 8, FMC_DA13, GPIO_AF12_FMC) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(D, 8, USART3_TX, GPIO_AF7_USART3) +#endif +#ifdef FDCAN2 +STM32_PIN_FUN_CFG(D, 9, FDCAN2_RX, GPIO_AF9_FDCAN2) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 9, FMC_D14, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(D, 9, FMC_DA14, GPIO_AF12_FMC) +#endif +#ifdef USART3 +STM32_PIN_FUN_CFG(D, 9, USART3_RX, GPIO_AF7_USART3) +#endif +#endif /* GPIOD */ + +/* Port E definitions */ +#ifdef GPIOE +#ifdef DCMI +STM32_PIN_FUN_CFG(E, 0, DCMI_D2, GPIO_AF13_DCMI) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(E, 0, FDCAN1_RX, GPIO_AF9_FDCAN1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 0, FMC_NBL0, GPIO_AF12_FMC) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(E, 0, LPTIM1_ETR, GPIO_AF1_LPTIM1) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(E, 0, LPTIM2_CH2, GPIO_AF3_LPTIM2) +#endif +#ifdef LPTIM2 +STM32_PIN_FUN_CFG(E, 0, LPTIM2_ETR, GPIO_AF4_LPTIM2) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(E, 0, PSSI_D2, GPIO_AF13_PSSI) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(E, 0, SAI2_MCLK_A, GPIO_AF10_SAI2) +#endif +#ifdef SPI3 +STM32_PIN_FUN_CFG(E, 0, SPI3_RDY, GPIO_AF6_SPI3) +#endif +#ifdef TIM4 +STM32_PIN_FUN_CFG(E, 0, TIM4_ETR, GPIO_AF2_TIM4) +#endif +#ifdef UART8 +STM32_PIN_FUN_CFG(E, 0, UART8_RX, GPIO_AF8_UART8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(E, 1, DCMI_D3, GPIO_AF13_DCMI) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(E, 1, FDCAN1_TX, GPIO_AF9_FDCAN1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 1, FMC_NBL1, GPIO_AF12_FMC) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(E, 1, LPTIM1_IN2, GPIO_AF1_LPTIM1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(E, 1, PSSI_D3, GPIO_AF13_PSSI) +#endif +#ifdef UART8 +STM32_PIN_FUN_CFG(E, 1, UART8_TX, GPIO_AF8_UART8) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 10, FMC_D7, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 10, FMC_DA7, GPIO_AF12_FMC) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(E, 10, OCTOSPI1_IO7, GPIO_AF10_OCTOSPI1) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(E, 10, TIM1_CH2N, GPIO_AF1_TIM1) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(E, 10, UART12_TX, GPIO_AF6_UART12) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(E, 10, UART7_CTS, GPIO_AF7_UART7) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 11, FMC_D8, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 11, FMC_DA8, GPIO_AF12_FMC) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(E, 11, OCTOSPI1_NCS, GPIO_AF6_OCTOSPI1) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(E, 11, SAI2_SD_B, GPIO_AF10_SAI2) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(E, 11, SPI1_RDY, GPIO_AF4_SPI1) +#endif +#ifdef SPI4 +STM32_PIN_FUN_CFG(E, 11, SPI4_NSS, GPIO_AF5_SPI4) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(E, 11, TIM1_CH2, GPIO_AF1_TIM1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 12, FMC_D9, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 12, FMC_DA9, GPIO_AF12_FMC) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(E, 12, SAI2_SCK_B, GPIO_AF10_SAI2) +#endif +#ifdef SPI4 +STM32_PIN_FUN_CFG(E, 12, SPI4_SCK, GPIO_AF5_SPI4) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(E, 12, TIM1_CH3N, GPIO_AF1_TIM1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 13, FMC_D10, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 13, FMC_DA10, GPIO_AF12_FMC) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(E, 13, SAI2_FS_B, GPIO_AF10_SAI2) +#endif +#ifdef SPI4 +STM32_PIN_FUN_CFG(E, 13, SPI4_MISO, GPIO_AF5_SPI4) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(E, 13, TIM1_CH3, GPIO_AF1_TIM1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 14, FMC_D11, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 14, FMC_DA11, GPIO_AF12_FMC) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(E, 14, SAI2_MCLK_B, GPIO_AF10_SAI2) +#endif +#ifdef SPI4 +STM32_PIN_FUN_CFG(E, 14, SPI4_MOSI, GPIO_AF5_SPI4) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(E, 14, TIM1_CH4, GPIO_AF1_TIM1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 15, FMC_D12, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 15, FMC_DA12, GPIO_AF12_FMC) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(E, 15, TIM1_BKIN, GPIO_AF1_TIM1) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(E, 15, TIM1_CH4N, GPIO_AF3_TIM1) +#endif +#ifdef USART10 +STM32_PIN_FUN_CFG(E, 15, USART10_CK, GPIO_AF7_USART10) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(E, 2, DCMI_D3, GPIO_AF13_DCMI) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(E, 2, ETH_TXD3, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 2, FMC_A23, GPIO_AF12_FMC) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(E, 2, LPTIM1_IN2, GPIO_AF1_LPTIM1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(E, 2, OCTOSPI1_IO2, GPIO_AF9_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(E, 2, PSSI_D3, GPIO_AF13_PSSI) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(E, 2, SAI1_CK1, GPIO_AF2_SAI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(E, 2, SAI1_MCLK_A, GPIO_AF6_SAI1) +#endif +#ifdef SPI4 +STM32_PIN_FUN_CFG(E, 2, SPI4_SCK, GPIO_AF5_SPI4) +#endif +#ifdef UART8 +STM32_PIN_FUN_CFG(E, 2, UART8_TX, GPIO_AF8_UART8) +#endif +#ifdef USART10 +STM32_PIN_FUN_CFG(E, 2, USART10_RX, GPIO_AF7_USART10) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 3, FMC_A19, GPIO_AF12_FMC) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(E, 3, SAI1_SD_B, GPIO_AF6_SAI1) +#endif +#ifdef TIM15 +STM32_PIN_FUN_CFG(E, 3, TIM15_BKIN, GPIO_AF4_TIM15) +#endif +#ifdef USART10 +STM32_PIN_FUN_CFG(E, 3, USART10_TX, GPIO_AF7_USART10) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(E, 4, DCMI_D4, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 4, FMC_A20, GPIO_AF12_FMC) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(E, 4, PSSI_D4, GPIO_AF13_PSSI) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(E, 4, SAI1_D2, GPIO_AF2_SAI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(E, 4, SAI1_FS_A, GPIO_AF6_SAI1) +#endif +#ifdef SPI4 +STM32_PIN_FUN_CFG(E, 4, SPI4_NSS, GPIO_AF5_SPI4) +#endif +#ifdef TIM15 +STM32_PIN_FUN_CFG(E, 4, TIM15_CH1N, GPIO_AF4_TIM15) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(E, 5, DCMI_D6, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 5, FMC_A21, GPIO_AF12_FMC) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(E, 5, PSSI_D6, GPIO_AF13_PSSI) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(E, 5, SAI1_CK2, GPIO_AF2_SAI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(E, 5, SAI1_SCK_A, GPIO_AF6_SAI1) +#endif +#ifdef SPI4 +STM32_PIN_FUN_CFG(E, 5, SPI4_MISO, GPIO_AF5_SPI4) +#endif +#ifdef TIM15 +STM32_PIN_FUN_CFG(E, 5, TIM15_CH1, GPIO_AF4_TIM15) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(E, 6, DCMI_D7, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 6, FMC_A22, GPIO_AF12_FMC) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(E, 6, PSSI_D7, GPIO_AF13_PSSI) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(E, 6, SAI1_D1, GPIO_AF2_SAI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(E, 6, SAI1_SD_A, GPIO_AF6_SAI1) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(E, 6, SAI2_MCLK_B, GPIO_AF10_SAI2) +#endif +#ifdef SPI4 +STM32_PIN_FUN_CFG(E, 6, SPI4_MOSI, GPIO_AF5_SPI4) +#endif +#ifdef TIM15 +STM32_PIN_FUN_CFG(E, 6, TIM15_CH2, GPIO_AF4_TIM15) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(E, 6, TIM1_BKIN2, GPIO_AF1_TIM1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 7, FMC_D4, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 7, FMC_DA4, GPIO_AF12_FMC) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(E, 7, OCTOSPI1_IO4, GPIO_AF10_OCTOSPI1) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(E, 7, TIM1_ETR, GPIO_AF1_TIM1) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(E, 7, UART12_DE, GPIO_AF6_UART12) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(E, 7, UART12_RTS, GPIO_AF6_UART12) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(E, 7, UART7_RX, GPIO_AF7_UART7) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 8, FMC_D5, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 8, FMC_DA5, GPIO_AF12_FMC) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(E, 8, OCTOSPI1_IO5, GPIO_AF10_OCTOSPI1) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(E, 8, TIM1_CH1N, GPIO_AF1_TIM1) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(E, 8, UART12_CTS, GPIO_AF6_UART12) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(E, 8, UART7_TX, GPIO_AF7_UART7) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 9, FMC_D6, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(E, 9, FMC_DA6, GPIO_AF12_FMC) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(E, 9, OCTOSPI1_IO6, GPIO_AF10_OCTOSPI1) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(E, 9, TIM1_CH1, GPIO_AF1_TIM1) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(E, 9, UART12_RX, GPIO_AF6_UART12) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(E, 9, UART7_DE, GPIO_AF7_UART7) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(E, 9, UART7_RTS, GPIO_AF7_UART7) +#endif +#endif /* GPIOE */ + +/* Port F definitions */ +#ifdef GPIOF +#ifdef FMC +STM32_PIN_FUN_CFG(F, 0, FMC_A0, GPIO_AF12_FMC) +#endif +#ifdef I2C2 +STM32_PIN_FUN_CFG(F, 0, I2C2_SDA, GPIO_AF4_I2C2) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(F, 0, LPTIM5_CH1, GPIO_AF13_LPTIM5) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(F, 1, FMC_A1, GPIO_AF12_FMC) +#endif +#ifdef I2C2 +STM32_PIN_FUN_CFG(F, 1, I2C2_SCL, GPIO_AF4_I2C2) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(F, 1, LPTIM5_CH2, GPIO_AF13_LPTIM5) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(F, 10, DCMI_D11, GPIO_AF13_DCMI) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(F, 10, OCTOSPI1_CLK, GPIO_AF9_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(F, 10, PSSI_D11, GPIO_AF13_PSSI) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(F, 10, PSSI_D15, GPIO_AF4_PSSI) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(F, 10, SAI1_D3, GPIO_AF2_SAI1) +#endif +#ifdef TIM16 +STM32_PIN_FUN_CFG(F, 10, TIM16_BKIN, GPIO_AF1_TIM16) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(F, 11, DCMI_D12, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(F, 11, FMC_SDNRAS, GPIO_AF12_FMC) +#endif +#ifdef LPTIM6 +STM32_PIN_FUN_CFG(F, 11, LPTIM6_CH1, GPIO_AF14_LPTIM6) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(F, 11, OCTOSPI1_NCLK, GPIO_AF9_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(F, 11, PSSI_D12, GPIO_AF13_PSSI) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(F, 11, SAI2_SD_B, GPIO_AF10_SAI2) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(F, 11, SPI5_MOSI, GPIO_AF5_SPI5) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(F, 12, FMC_A6, GPIO_AF12_FMC) +#endif +#ifdef LPTIM6 +STM32_PIN_FUN_CFG(F, 12, LPTIM6_CH2, GPIO_AF14_LPTIM6) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(F, 13, FMC_A7, GPIO_AF12_FMC) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(F, 13, I2C4_SMBA, GPIO_AF4_I2C4) +#endif +#ifdef LPTIM6 +STM32_PIN_FUN_CFG(F, 13, LPTIM6_IN1, GPIO_AF14_LPTIM6) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(F, 14, FMC_A8, GPIO_AF12_FMC) +#endif +#ifdef LPTIM6 +STM32_PIN_FUN_CFG(F, 14, LPTIM6_IN2, GPIO_AF14_LPTIM6) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(F, 15, FMC_A9, GPIO_AF12_FMC) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(F, 15, I2C4_SDA, GPIO_AF4_I2C4) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(F, 15, I3C1_SDA, GPIO_AF5_I3C1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(F, 2, FMC_A2, GPIO_AF12_FMC) +#endif +#ifdef I2C2 +STM32_PIN_FUN_CFG(F, 2, I2C2_SMBA, GPIO_AF4_I2C2) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(F, 2, LPTIM3_CH2, GPIO_AF2_LPTIM3) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(F, 2, LPTIM3_IN2, GPIO_AF3_LPTIM3) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(F, 2, LPTIM5_IN1, GPIO_AF13_LPTIM5) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(F, 2, UART12_TX, GPIO_AF6_UART12) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(F, 2, USART11_CK, GPIO_AF7_USART11) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(F, 3, FMC_A3, GPIO_AF12_FMC) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(F, 3, LPTIM3_IN1, GPIO_AF2_LPTIM3) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(F, 3, LPTIM5_IN2, GPIO_AF13_LPTIM5) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(F, 3, USART11_TX, GPIO_AF7_USART11) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(F, 4, FMC_A4, GPIO_AF12_FMC) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(F, 4, LPTIM3_ETR, GPIO_AF2_LPTIM3) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(F, 4, USART11_RX, GPIO_AF7_USART11) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(F, 5, FMC_A5, GPIO_AF12_FMC) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(F, 5, I2C4_SCL, GPIO_AF4_I2C4) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(F, 5, I3C1_SCL, GPIO_AF5_I3C1) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(F, 5, LPTIM3_CH1, GPIO_AF2_LPTIM3) +#endif +#ifdef LPTIM3 +STM32_PIN_FUN_CFG(F, 5, LPTIM3_IN1, GPIO_AF14_LPTIM3) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(F, 5, UART12_RX, GPIO_AF6_UART12) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(F, 5, USART11_CTS, GPIO_AF7_USART11) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(F, 5, USART11_NSS, GPIO_AF7_USART11) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(F, 6, LPTIM5_CH1, GPIO_AF13_LPTIM5) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(F, 6, OCTOSPI1_IO3, GPIO_AF10_OCTOSPI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(F, 6, SAI1_SD_B, GPIO_AF6_SAI1) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(F, 6, SPI5_NSS, GPIO_AF5_SPI5) +#endif +#ifdef TIM16 +STM32_PIN_FUN_CFG(F, 6, TIM16_CH1, GPIO_AF1_TIM16) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(F, 6, UART7_RX, GPIO_AF7_UART7) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(F, 7, LPTIM5_CH2, GPIO_AF13_LPTIM5) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(F, 7, OCTOSPI1_IO2, GPIO_AF10_OCTOSPI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(F, 7, SAI1_MCLK_B, GPIO_AF6_SAI1) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(F, 7, SPI5_SCK, GPIO_AF5_SPI5) +#endif +#ifdef TIM17 +STM32_PIN_FUN_CFG(F, 7, TIM17_CH1, GPIO_AF1_TIM17) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(F, 7, UART7_TX, GPIO_AF7_UART7) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(F, 8, LPTIM5_IN1, GPIO_AF13_LPTIM5) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(F, 8, OCTOSPI1_IO0, GPIO_AF10_OCTOSPI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(F, 8, SAI1_SCK_B, GPIO_AF6_SAI1) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(F, 8, SPI5_MISO, GPIO_AF5_SPI5) +#endif +#ifdef TIM13 +STM32_PIN_FUN_CFG(F, 8, TIM13_CH1, GPIO_AF9_TIM13) +#endif +#ifdef TIM16 +STM32_PIN_FUN_CFG(F, 8, TIM16_CH1N, GPIO_AF1_TIM16) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(F, 8, UART7_DE, GPIO_AF7_UART7) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(F, 8, UART7_RTS, GPIO_AF7_UART7) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(F, 9, LPTIM5_IN2, GPIO_AF13_LPTIM5) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(F, 9, OCTOSPI1_IO1, GPIO_AF10_OCTOSPI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(F, 9, SAI1_FS_B, GPIO_AF6_SAI1) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(F, 9, SPI5_MOSI, GPIO_AF5_SPI5) +#endif +#ifdef TIM14 +STM32_PIN_FUN_CFG(F, 9, TIM14_CH1, GPIO_AF9_TIM14) +#endif +#ifdef TIM17 +STM32_PIN_FUN_CFG(F, 9, TIM17_CH1N, GPIO_AF1_TIM17) +#endif +#ifdef UART7 +STM32_PIN_FUN_CFG(F, 9, UART7_CTS, GPIO_AF7_UART7) +#endif +#endif /* GPIOF */ + +/* Port G definitions */ +#ifdef GPIOG +#ifdef FMC +STM32_PIN_FUN_CFG(G, 0, FMC_A10, GPIO_AF12_FMC) +#endif +#ifdef LPTIM4 +STM32_PIN_FUN_CFG(G, 0, LPTIM4_IN1, GPIO_AF14_LPTIM4) +#endif +#ifdef UART9 +STM32_PIN_FUN_CFG(G, 0, UART9_RX, GPIO_AF11_UART9) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 1, FMC_A11, GPIO_AF12_FMC) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(G, 1, I2S2_SDO, GPIO_AF7_SPI2) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(G, 1, SPI2_MOSI, GPIO_AF7_SPI2) +#endif +#ifdef UART9 +STM32_PIN_FUN_CFG(G, 1, UART9_TX, GPIO_AF11_UART9) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(G, 10, DCMI_D2, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 10, FMC_NE3, GPIO_AF12_FMC) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(G, 10, I2S1_WS, GPIO_AF5_SPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(G, 10, PSSI_D2, GPIO_AF13_PSSI) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(G, 10, SAI2_SD_B, GPIO_AF10_SAI2) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(G, 10, SDMMC2_D1, GPIO_AF11_SDMMC2) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(G, 10, SPI1_NSS, GPIO_AF5_SPI1) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(G, 11, DCMI_D3, GPIO_AF13_DCMI) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(G, 11, ETH_TX_EN, GPIO_AF11_ETH) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(G, 11, I2S1_CK, GPIO_AF5_SPI1) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(G, 11, LPTIM1_IN2, GPIO_AF1_LPTIM1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(G, 11, PSSI_D3, GPIO_AF13_PSSI) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(G, 11, SDMMC2_D2, GPIO_AF10_SDMMC2) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(G, 11, SPI1_SCK, GPIO_AF5_SPI1) +#endif +#ifdef USART10 +STM32_PIN_FUN_CFG(G, 11, USART10_RX, GPIO_AF6_USART10) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(G, 11, USART11_DE, GPIO_AF7_USART11) +#endif +#ifdef USART11 +STM32_PIN_FUN_CFG(G, 11, USART11_RTS, GPIO_AF7_USART11) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(G, 12, DCMI_D11, GPIO_AF13_DCMI) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(G, 12, ETH_TXD1, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 12, FMC_NE4, GPIO_AF12_FMC) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(G, 12, LPTIM1_IN1, GPIO_AF1_LPTIM1) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(G, 12, LPTIM5_CH1, GPIO_AF14_LPTIM5) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(G, 12, PSSI_D11, GPIO_AF13_PSSI) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(G, 12, PSSI_D15, GPIO_AF4_PSSI) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(G, 12, SDMMC2_D3, GPIO_AF10_SDMMC2) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(G, 12, SPI6_MISO, GPIO_AF5_SPI6) +#endif +#ifdef USART10 +STM32_PIN_FUN_CFG(G, 12, USART10_TX, GPIO_AF6_USART10) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(G, 12, USART6_DE, GPIO_AF7_USART6) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(G, 12, USART6_RTS, GPIO_AF7_USART6) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(G, 13, ETH_TXD0, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 13, FMC_A24, GPIO_AF12_FMC) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(G, 13, LPTIM1_CH1, GPIO_AF1_LPTIM1) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(G, 13, LPTIM5_CH2, GPIO_AF13_LPTIM5) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(G, 13, SDMMC2_D6, GPIO_AF10_SDMMC2) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(G, 13, SPI6_SCK, GPIO_AF5_SPI6) +#endif +#ifdef USART10 +STM32_PIN_FUN_CFG(G, 13, USART10_CTS, GPIO_AF6_USART10) +#endif +#ifdef USART10 +STM32_PIN_FUN_CFG(G, 13, USART10_NSS, GPIO_AF6_USART10) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(G, 13, USART6_CTS, GPIO_AF7_USART6) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(G, 13, USART6_NSS, GPIO_AF7_USART6) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(G, 14, ETH_TXD1, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 14, FMC_A25, GPIO_AF12_FMC) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(G, 14, LPTIM1_CH2, GPIO_AF4_LPTIM1) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(G, 14, LPTIM1_ETR, GPIO_AF1_LPTIM1) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(G, 14, LPTIM5_IN1, GPIO_AF13_LPTIM5) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(G, 14, OCTOSPI1_IO7, GPIO_AF9_OCTOSPI1) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(G, 14, SDMMC2_D7, GPIO_AF10_SDMMC2) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(G, 14, SPI6_MOSI, GPIO_AF5_SPI6) +#endif +#ifdef USART10 +STM32_PIN_FUN_CFG(G, 14, USART10_DE, GPIO_AF6_USART10) +#endif +#ifdef USART10 +STM32_PIN_FUN_CFG(G, 14, USART10_RTS, GPIO_AF6_USART10) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(G, 14, USART6_TX, GPIO_AF7_USART6) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(G, 15, DCMI_D13, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 15, FMC_SDNCAS, GPIO_AF12_FMC) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(G, 15, PSSI_D13, GPIO_AF13_PSSI) +#endif +#ifdef SPI4 +STM32_PIN_FUN_CFG(G, 15, SPI4_RDY, GPIO_AF5_SPI4) +#endif +#ifdef USART10 +STM32_PIN_FUN_CFG(G, 15, USART10_CK, GPIO_AF6_USART10) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(G, 15, USART6_CTS, GPIO_AF7_USART6) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(G, 15, USART6_NSS, GPIO_AF7_USART6) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 2, FMC_A12, GPIO_AF12_FMC) +#endif +#ifdef LPTIM6 +STM32_PIN_FUN_CFG(G, 2, LPTIM6_ETR, GPIO_AF14_LPTIM6) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(G, 2, TIM8_BKIN, GPIO_AF3_TIM8) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(G, 2, UART12_RX, GPIO_AF7_UART12) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 3, FMC_A13, GPIO_AF12_FMC) +#endif +#ifdef LPTIM5 +STM32_PIN_FUN_CFG(G, 3, LPTIM5_ETR, GPIO_AF13_LPTIM5) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(G, 3, TIM8_BKIN2, GPIO_AF3_TIM8) +#endif +#ifdef UART12 +STM32_PIN_FUN_CFG(G, 3, UART12_TX, GPIO_AF7_UART12) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 4, FMC_A14, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 4, FMC_BA0, GPIO_AF12_FMC) +#endif +#ifdef LPTIM4 +STM32_PIN_FUN_CFG(G, 4, LPTIM4_ETR, GPIO_AF14_LPTIM4) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(G, 4, TIM1_BKIN2, GPIO_AF1_TIM1) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 5, FMC_A15, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 5, FMC_BA1, GPIO_AF12_FMC) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(G, 5, TIM1_ETR, GPIO_AF1_TIM1) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(G, 6, DCMI_D12, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 6, FMC_NE3, GPIO_AF12_FMC) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(G, 6, I2C4_SDA, GPIO_AF4_I2C4) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(G, 6, I3C1_SDA, GPIO_AF3_I3C1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(G, 6, OCTOSPI1_NCS, GPIO_AF10_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(G, 6, PSSI_D12, GPIO_AF13_PSSI) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(G, 6, SPI1_RDY, GPIO_AF5_SPI1) +#endif +#ifdef TIM17 +STM32_PIN_FUN_CFG(G, 6, TIM17_BKIN, GPIO_AF1_TIM17) +#endif +#ifdef UCPD1 +STM32_PIN_FUN_CFG(G, 6, UCPD1_FRSTX, GPIO_AF11_UCPD1) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(G, 7, DCMI_D13, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 7, FMC_INT, GPIO_AF12_FMC) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(G, 7, I2C4_SCL, GPIO_AF4_I2C4) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(G, 7, I3C1_SCL, GPIO_AF3_I3C1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(G, 7, PSSI_D13, GPIO_AF13_PSSI) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(G, 7, SAI1_CK2, GPIO_AF2_SAI1) +#endif +#ifdef SAI1 +STM32_PIN_FUN_CFG(G, 7, SAI1_MCLK_A, GPIO_AF6_SAI1) +#endif +#ifdef UCPD1 +STM32_PIN_FUN_CFG(G, 7, UCPD1_FRSTX, GPIO_AF11_UCPD1) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(G, 7, USART6_CK, GPIO_AF7_USART6) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(G, 8, ETH_PPS_OUT, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 8, FMC_SDCLK, GPIO_AF12_FMC) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(G, 8, SPI6_NSS, GPIO_AF5_SPI6) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(G, 8, TIM8_ETR, GPIO_AF3_TIM8) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(G, 8, USART6_DE, GPIO_AF7_USART6) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(G, 8, USART6_RTS, GPIO_AF7_USART6) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(G, 9, DCMI_VSYNC, GPIO_AF13_DCMI) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 9, FMC_NCE, GPIO_AF12_FMC) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(G, 9, FMC_NE2, GPIO_AF12_FMC) +#endif +#ifdef I2S1 +STM32_PIN_FUN_CFG(G, 9, I2S1_SDI, GPIO_AF5_SPI1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(G, 9, OCTOSPI1_IO6, GPIO_AF9_OCTOSPI1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(G, 9, PSSI_RDY, GPIO_AF13_PSSI) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(G, 9, SAI2_FS_B, GPIO_AF10_SAI2) +#endif +#ifdef SDMMC2 +STM32_PIN_FUN_CFG(G, 9, SDMMC2_D0, GPIO_AF11_SDMMC2) +#endif +#ifdef SPI1 +STM32_PIN_FUN_CFG(G, 9, SPI1_MISO, GPIO_AF5_SPI1) +#endif +#ifdef USART6 +STM32_PIN_FUN_CFG(G, 9, USART6_RX, GPIO_AF7_USART6) +#endif +#endif /* GPIOG */ + +/* Port H definitions */ +#ifdef GPIOH +#ifdef DCMI +STM32_PIN_FUN_CFG(H, 10, DCMI_D1, GPIO_AF13_DCMI) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(H, 10, I2C4_SMBA, GPIO_AF4_I2C4) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(H, 10, PSSI_D1, GPIO_AF13_PSSI) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(H, 10, SPI5_RDY, GPIO_AF5_SPI5) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(H, 10, TIM1_CH1N, GPIO_AF1_TIM1) +#endif +#ifdef TIM5 +STM32_PIN_FUN_CFG(H, 10, TIM5_CH1, GPIO_AF2_TIM5) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(H, 10, TIM8_CH3, GPIO_AF3_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(H, 11, DCMI_D2, GPIO_AF13_DCMI) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(H, 11, I2C4_SCL, GPIO_AF4_I2C4) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(H, 11, I3C1_SCL, GPIO_AF5_I3C1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(H, 11, PSSI_D2, GPIO_AF13_PSSI) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(H, 11, TIM1_CH1, GPIO_AF1_TIM1) +#endif +#ifdef TIM5 +STM32_PIN_FUN_CFG(H, 11, TIM5_CH2, GPIO_AF2_TIM5) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(H, 11, TIM8_CH3N, GPIO_AF3_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(H, 12, DCMI_D3, GPIO_AF13_DCMI) +#endif +#ifdef I2C4 +STM32_PIN_FUN_CFG(H, 12, I2C4_SDA, GPIO_AF4_I2C4) +#endif +#ifdef I3C1 +STM32_PIN_FUN_CFG(H, 12, I3C1_SDA, GPIO_AF5_I3C1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(H, 12, PSSI_D3, GPIO_AF13_PSSI) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(H, 12, TIM1_BKIN, GPIO_AF1_TIM1) +#endif +#ifdef TIM5 +STM32_PIN_FUN_CFG(H, 12, TIM5_CH3, GPIO_AF2_TIM5) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(H, 12, TIM8_BKIN, GPIO_AF3_TIM8) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(H, 12, TIM8_CH4N, GPIO_AF10_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(H, 13, DCMI_D3, GPIO_AF13_DCMI) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(H, 13, FDCAN1_TX, GPIO_AF9_FDCAN1) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(H, 13, LPTIM1_IN2, GPIO_AF1_LPTIM1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(H, 13, PSSI_D3, GPIO_AF13_PSSI) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(H, 13, TIM8_CH1N, GPIO_AF3_TIM8) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(H, 13, UART4_TX, GPIO_AF8_UART4) +#endif +#ifdef UART8 +STM32_PIN_FUN_CFG(H, 13, UART8_TX, GPIO_AF7_UART8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(H, 14, DCMI_D4, GPIO_AF13_DCMI) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(H, 14, FDCAN1_RX, GPIO_AF9_FDCAN1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(H, 14, PSSI_D4, GPIO_AF13_PSSI) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(H, 14, TIM8_CH2N, GPIO_AF3_TIM8) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(H, 14, UART4_RX, GPIO_AF8_UART4) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(H, 15, DCMI_D11, GPIO_AF13_DCMI) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(H, 15, PSSI_D11, GPIO_AF13_PSSI) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(H, 15, TIM8_CH3N, GPIO_AF3_TIM8) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(H, 2, ETH_CRS, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(H, 2, FMC_SDCKE0, GPIO_AF12_FMC) +#endif +#ifdef LPTIM1 +STM32_PIN_FUN_CFG(H, 2, LPTIM1_IN2, GPIO_AF1_LPTIM1) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(H, 2, OCTOSPI1_IO4, GPIO_AF9_OCTOSPI1) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(H, 2, SAI2_SCK_B, GPIO_AF10_SAI2) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(H, 3, ETH_COL, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(H, 3, FMC_SDNE0, GPIO_AF12_FMC) +#endif +#ifdef OCTOSPI1 +STM32_PIN_FUN_CFG(H, 3, OCTOSPI1_IO5, GPIO_AF9_OCTOSPI1) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(H, 3, SAI2_MCLK_B, GPIO_AF10_SAI2) +#endif +#ifdef I2C2 +STM32_PIN_FUN_CFG(H, 4, I2C2_SCL, GPIO_AF4_I2C2) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(H, 4, PSSI_D14, GPIO_AF13_PSSI) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(H, 4, SPI5_RDY, GPIO_AF5_SPI5) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(H, 4, SPI6_RDY, GPIO_AF7_SPI6) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(H, 5, FMC_SDNWE, GPIO_AF12_FMC) +#endif +#ifdef I2C2 +STM32_PIN_FUN_CFG(H, 5, I2C2_SDA, GPIO_AF4_I2C2) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(H, 5, SPI5_NSS, GPIO_AF5_SPI5) +#endif +#ifdef SPI6 +STM32_PIN_FUN_CFG(H, 5, SPI6_RDY, GPIO_AF7_SPI6) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(H, 6, DCMI_D8, GPIO_AF13_DCMI) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(H, 6, ETH_RXD2, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(H, 6, FMC_SDNE1, GPIO_AF12_FMC) +#endif +#ifdef I2C2 +STM32_PIN_FUN_CFG(H, 6, I2C2_SMBA, GPIO_AF4_I2C2) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(H, 6, PSSI_D8, GPIO_AF13_PSSI) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(H, 6, SPI5_SCK, GPIO_AF5_SPI5) +#endif +#ifdef TIM12 +STM32_PIN_FUN_CFG(H, 6, TIM12_CH1, GPIO_AF2_TIM12) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(H, 6, TIM1_CH3N, GPIO_AF1_TIM1) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(H, 6, TIM8_CH1, GPIO_AF3_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(H, 7, DCMI_D9, GPIO_AF13_DCMI) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(H, 7, ETH_RXD3, GPIO_AF11_ETH) +#endif +#ifdef FMC +STM32_PIN_FUN_CFG(H, 7, FMC_SDCKE1, GPIO_AF12_FMC) +#endif +#ifdef I2C3 +STM32_PIN_FUN_CFG(H, 7, I2C3_SCL, GPIO_AF4_I2C3) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(H, 7, PSSI_D9, GPIO_AF13_PSSI) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(H, 7, SPI5_MISO, GPIO_AF5_SPI5) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(H, 7, TIM1_CH3, GPIO_AF1_TIM1) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(H, 7, TIM8_CH1N, GPIO_AF3_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(H, 8, DCMI_HSYNC, GPIO_AF13_DCMI) +#endif +#ifdef I2C3 +STM32_PIN_FUN_CFG(H, 8, I2C3_SDA, GPIO_AF4_I2C3) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(H, 8, PSSI_DE, GPIO_AF13_PSSI) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(H, 8, SPI5_MOSI, GPIO_AF5_SPI5) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(H, 8, TIM1_CH2N, GPIO_AF1_TIM1) +#endif +#ifdef TIM5 +STM32_PIN_FUN_CFG(H, 8, TIM5_ETR, GPIO_AF2_TIM5) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(H, 8, TIM8_CH2, GPIO_AF3_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(H, 9, DCMI_D0, GPIO_AF13_DCMI) +#endif +#ifdef I2C3 +STM32_PIN_FUN_CFG(H, 9, I2C3_SMBA, GPIO_AF4_I2C3) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(H, 9, PSSI_D0, GPIO_AF13_PSSI) +#endif +#ifdef SPI5 +STM32_PIN_FUN_CFG(H, 9, SPI5_NSS, GPIO_AF5_SPI5) +#endif +#ifdef TIM12 +STM32_PIN_FUN_CFG(H, 9, TIM12_CH2, GPIO_AF2_TIM12) +#endif +#ifdef TIM1 +STM32_PIN_FUN_CFG(H, 9, TIM1_CH2, GPIO_AF1_TIM1) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(H, 9, TIM8_CH2N, GPIO_AF3_TIM8) +#endif +#endif /* GPIOH */ + +/* Port I definitions */ +#ifdef GPIOI +#ifdef DCMI +STM32_PIN_FUN_CFG(I, 0, DCMI_D13, GPIO_AF13_DCMI) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(I, 0, I2S2_WS, GPIO_AF5_SPI2) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(I, 0, PSSI_D13, GPIO_AF13_PSSI) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(I, 0, SPI2_NSS, GPIO_AF5_SPI2) +#endif +#ifdef TIM5 +STM32_PIN_FUN_CFG(I, 0, TIM5_CH4, GPIO_AF2_TIM5) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(I, 1, DCMI_D8, GPIO_AF13_DCMI) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(I, 1, I2S2_CK, GPIO_AF5_SPI2) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(I, 1, PSSI_D8, GPIO_AF13_PSSI) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(I, 1, SPI2_SCK, GPIO_AF5_SPI2) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(I, 1, TIM8_BKIN2, GPIO_AF3_TIM8) +#endif +#ifdef ETH +STM32_PIN_FUN_CFG(I, 10, ETH_RX_ER, GPIO_AF11_ETH) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(I, 10, FDCAN1_RX, GPIO_AF9_FDCAN1) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(I, 10, PSSI_D14, GPIO_AF13_PSSI) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(I, 11, PSSI_D15, GPIO_AF13_PSSI) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(I, 2, DCMI_D9, GPIO_AF13_DCMI) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(I, 2, I2S2_SDI, GPIO_AF5_SPI2) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(I, 2, PSSI_D9, GPIO_AF13_PSSI) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(I, 2, SPI2_MISO, GPIO_AF5_SPI2) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(I, 2, TIM8_CH4, GPIO_AF3_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(I, 3, DCMI_D10, GPIO_AF13_DCMI) +#endif +#ifdef I2S2 +STM32_PIN_FUN_CFG(I, 3, I2S2_SDO, GPIO_AF5_SPI2) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(I, 3, PSSI_D10, GPIO_AF13_PSSI) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(I, 3, SPI2_MOSI, GPIO_AF5_SPI2) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(I, 3, TIM8_ETR, GPIO_AF3_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(I, 4, DCMI_D5, GPIO_AF13_DCMI) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(I, 4, PSSI_D5, GPIO_AF13_PSSI) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(I, 4, SAI2_MCLK_A, GPIO_AF10_SAI2) +#endif +#ifdef SPI2 +STM32_PIN_FUN_CFG(I, 4, SPI2_RDY, GPIO_AF7_SPI2) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(I, 4, TIM8_BKIN, GPIO_AF3_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(I, 5, DCMI_VSYNC, GPIO_AF13_DCMI) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(I, 5, PSSI_RDY, GPIO_AF13_PSSI) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(I, 5, SAI2_SCK_A, GPIO_AF10_SAI2) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(I, 5, TIM8_CH1, GPIO_AF3_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(I, 6, DCMI_D6, GPIO_AF13_DCMI) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(I, 6, PSSI_D6, GPIO_AF13_PSSI) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(I, 6, SAI2_SD_A, GPIO_AF10_SAI2) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(I, 6, TIM8_CH2, GPIO_AF3_TIM8) +#endif +#ifdef DCMI +STM32_PIN_FUN_CFG(I, 7, DCMI_D7, GPIO_AF13_DCMI) +#endif +#ifdef PSSI +STM32_PIN_FUN_CFG(I, 7, PSSI_D7, GPIO_AF13_PSSI) +#endif +#ifdef SAI2 +STM32_PIN_FUN_CFG(I, 7, SAI2_FS_A, GPIO_AF10_SAI2) +#endif +#ifdef TIM8 +STM32_PIN_FUN_CFG(I, 7, TIM8_CH3, GPIO_AF3_TIM8) +#endif +#ifdef FDCAN1 +STM32_PIN_FUN_CFG(I, 9, FDCAN1_RX, GPIO_AF9_FDCAN1) +#endif +#ifdef UART4 +STM32_PIN_FUN_CFG(I, 9, UART4_RX, GPIO_AF8_UART4) +#endif +#endif /* GPIOI */ + +#ifdef __cplusplus +} +#endif + +#endif /* _STM32_PIN_CFG_H */ diff --git a/hw/mcu/stm/stm32h5xx/src/stm32_pin_cfg.c b/hw/mcu/stm/stm32h5xx/src/stm32_pin_cfg.c new file mode 100644 index 000000000..f2af0a9ad --- /dev/null +++ b/hw/mcu/stm/stm32h5xx/src/stm32_pin_cfg.c @@ -0,0 +1,112 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include <os/mynewt.h> +#include <mcu/stm32_hal.h> +#include <stm32_common/mcu.h> + +#define STM32_PIN_FUN_CFG(port_n, pin_n, pf, af) \ +const struct stm32_pin_cfg _P##port_n##pin_n##_##pf = {\ + .pin = MCU_GPIO_PORT##port_n(pin_n),\ + .hal_init = {\ + .Pin = 1 << (pin_n), \ + .Mode = GPIO_MODE_AF_PP, \ + .Pull = GPIO_NOPULL, \ + .Speed = GPIO_SPEED_FREQ_VERY_HIGH, \ + .Alternate = af, \ + }\ +};\ +static stm32_pin_cfg_t const P##port_n##pin_n##_##pf __unused = &_P##port_n##pin_n##_##pf; + +#define STM32_PIN_FUN_OD_CFG(port_n, pin_n, pf, af) \ +const struct stm32_pin_cfg _P##port_n##pin_n##_##pf##_OD = {\ + .pin = MCU_GPIO_PORT##port_n(pin_n),\ + .hal_init = {\ + .Pin = 1 << (pin_n), \ + .Mode = GPIO_MODE_AF_OD, \ + .Pull = GPIO_NOPULL, \ + .Speed = GPIO_SPEED_FREQ_VERY_HIGH, \ + .Alternate = af, \ + }\ +};\ +static stm32_pin_cfg_t const P##port_n##pin_n##_##pf##_OD __unused = &_P##port_n##pin_n##_##pf##_OD; + +#define STM32_PIN_FUN_OD_PU_CFG(port_n, pin_n, pf, af) \ +const struct stm32_pin_cfg _P##port_n##pin_n##_##pf##_OD_PU = {\ + .pin = MCU_GPIO_PORT##port_n(pin_n),\ + .hal_init = {\ + .Pin = 1 << (pin_n), \ + .Mode = GPIO_MODE_AF_OD, \ + .Pull = GPIO_PULLUP, \ + .Speed = GPIO_SPEED_FREQ_VERY_HIGH, \ + .Alternate = af, \ + }\ +};\ +static stm32_pin_cfg_t const P##port_n##pin_n##_##pf##_OD_PU __unused = &_P##port_n##pin_n##_##pf##_OD_PU; + +#define STM32_PIN_DEF(port_n, pin_n, pin_mode) \ +const struct stm32_pin_cfg _P##port_n##pin_n##_##pin_mode = {\ + .pin = MCU_GPIO_PORT##port_n(pin_n),\ + .hal_init = {\ + .Pin = 1 << (pin_n), \ + .Mode = GPIO_MODE_##pin_mode, \ + .Pull = GPIO_NOPULL, \ + .Speed = GPIO_SPEED_FREQ_VERY_HIGH, \ + }\ +};\ +const stm32_pin_t P##port_n##pin_n##_##pin_mode __unused = &_P##port_n##pin_n##_##pin_mode; + +#include <mcu/stm32_pin_cfg.h> + +void +stm32_pin_config(stm32_pin_cfg_t cfg) +{ + if (cfg) { + hal_gpio_init_stm(cfg->pin, (GPIO_InitTypeDef *)&cfg->hal_init); + } +} + +void +stm32_pin_write(stm32_pin_cfg_t cfg, uint8_t val) +{ + if (cfg) { + hal_gpio_write(cfg->pin, val); + } +} + +uint8_t +stm32_pin_read(stm32_pin_cfg_t cfg) +{ + return cfg ? hal_gpio_read(cfg->pin) : 0; +} + +void +stm32_pin_pulse(hal_gpio_pin_t pin) +{ + hal_gpio_write(pin, 1); + hal_gpio_write(pin, 0); +} + +void +stm32_pin_pulse_n(hal_gpio_pin_t pin, int pulse_count) +{ + for (int i = 0; i < pulse_count; i++) { + stm32_pin_pulse(pin); + } +}
